tag: Arizona State University

Chip Industry Technical Paper Roundup: Apr. 1
By Linda Christensen - 01 Apr, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=416 /] Find more semiconductor research papers here. » read more

Evaluation Tool For The Cost Impacts Of Chiplet-Specific Design Choices
By Technical Paper Link - 25 Mar, 2025 - Comments: 0

A new technical paper titled "CATCH: a Cost Analysis Tool for Co-optimization of chiplet-based Heterogeneous systems" was published by researchers at UCLA, Duke University and Arizona State University. Abstract "With the increasing prevalence of chiplet systems in high-performance computing applications, the number of design options has increased dramatically. Instead of chips defaulting to... » read more

Defect Analysis and Testing Framework For FOWLP Interconnects
By Technical Paper Link - 24 Mar, 2025 - Comments: 0

A new technical paper titled "Defect Analysis and Built-In-Self-Test for Chiplet Interconnects in Fan-out Wafer-Level Packaging" was published by researchers at Arizona State University. Abstract "Fan-out wafer-level packaging (FOWLP) addresses the demand for higher interconnect densities by offering reduced form factor, improved signal integrity, and enhanced performance. However, FOWLP fa... » read more

Chip Industry Technical Paper Roundup: Feb. 18
By Linda Christensen - 18 Feb, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=406 /] Find all technical papers here. » read more

FOWLP Warpage: Review Of Causes, Modeling And Methodologies For Controlling
By Technical Paper Link - 14 Feb, 2025 - Comments: 0

A new technical paper titled "Warpage in wafer-level packaging: a review of causes, modelling, and mitigation strategies" was published by researchers at Arizona State University. Abstract "Wafer-level packaging (WLP) is a pivotal semiconductor packaging technology that enables heterogeneously integrated advanced semiconductor packages with high-density electrical interconnections through i... » read more

Universities Augment Engineering Curricula To Boost Employability
By Liz Allan - 05 Feb, 2025 - Comments: 0

Increasing numbers of universities are offering semiconductor courses in their engineering programs, and also in math, physics, and business degrees. Most universities now offer a broad foundation so students can pivot to other industries during cyclical downturns, or when technology and science create entirely new and potentially lucrative opportunities, such as generative AI, advanced pack... » read more

Chip Industry Week In Review
By The SE Staff - 24 Jan, 2025 - Comments: 0

The new Trump administration was quick to put a different stamp on the tech world: President Trump rescinded a long list of Biden’s executive orders, including those aimed at AI safety and the mandate for 50% EVs by 2030. Roughly 1.3 million EVs were sold in the U.S. in 2024, up 7.3% from 2023. The new administration announced $500 billion ($100 billion initially) in private sector in... » read more

Shortcutting Graduates’ Path To Productivity In Manufacturing And Test
By Liz Allan - 16 Dec, 2024 - Comments: 1

Manufacturing, test, assembly, and analytics companies are finding unique ways to engage with universities in an effort to shore up the talent pipeline. The industry is recruiting graduates from universities across the U.S. while partnering with local institutes to serve specific needs. Industry/university co-operation includes: Mapping job descriptions Providing curricula frameworks... » read more

Chip Industry Week In Review
By The SE Staff - 22 Nov, 2024 - Comments: 0

SK hynix started mass production of 1-terabit  321-high NAND, with availability scheduled for the first half of next year. Rapidus will receive an additional ¥200 billion yen ($1.28B) from the Japanese government beginning in fiscal year 2025, reports Nikkei. This is on top of ¥920 billion yen ($5.98B) Rapidus has already received from the government in support of its goal to reach commer... » read more

Chip Industry Technical Paper Roundup: Nov. 5
By Linda Christensen - 05 Nov, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=378 /]   Further Reading Chip Industry Week In Review Silicon Valley design center and NY EUV Accelerator; Siemens’ big acquisition; Onto extends panel inspection with two acquisitions; DENSO-Quadric deal; thinner Si-based power wafer; $100M funding for AI; trade wars escalate; earnings rep... » read more

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