Blog Review: June 28

By Jesse Allen - 28 Jun, 2023 - Comments: 0

In a podcast, Siemens' Spencer Acain discusses the role of AI and machine learning in IC verification and how it could help address noise by analyzing different signals from the diagnosis data to figure out the real root cause of a failure. Synopsys' Ian Land and Ron DiGiuseppe find that designers of aerospace microelectronics are applying lessons and technologies learned from the automotive... » read more

The Uncertainties Of RISC-V Compliance

By Ann Mutschler - 22 Jun, 2023 - Comments: 0

How far can a RISC-V design be pushed and still be compliant? The answer isn't always black-and-white because the RISC-V concept is very different from previous open-source projects. But as interest and activity in RISC-V continues to grow, constructive discussions are taking place to address some of the challenges of designing with an open-standard ISA. “The RISC-V standard is somethin... » read more

Blog Review: June 21

By Jesse Allen - 21 Jun, 2023 - Comments: 0

Synopsys' Vikram Bhatia identifies four trends driving the migration of EDA tools and chip design workloads to the cloud, from ever-increasing compute and time-to-market demands to advanced cybersecurity features. Cadence's Veena Parthan checks out how computational fluid dynamics and finite element analysis can help improve aquaculture with sustainable fish cage nets that minimize stagnatio... » read more

CEO Outlook: Chiplets, Data Management, And Reliability

By Ed Sperling - 14 Jun, 2023 - Comments: 0

Semiconductor Engineering sat down to talk about changes in chip design with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business Unit; Niels Faché, vice president and general manager of PathWave Software Solutions at Keysight; ... » read more

Blog Review: June 14

By Jesse Allen - 14 Jun, 2023 - Comments: 0

Synopsys' Richard Solomon and Gary Ruggles examine the Compute Express Link (CXL) protocol and how it could unlock new ways of doing computing such as enabling efficient heterogeneous computing architectures, accelerating data-intensive workloads, and facilitating advanced real-time analytics. Cadence's Andre Baguenie explains how to convert an electrical signal to a logic value using the Ve... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 09 Jun, 2023 - Comments: 0

The European Union’s Chips Act Commission has approved €8.1 billion ($8.73 billion) in funding for an Important Project of Common European Interest (IPCEI). As part of this IPCEI, 56 companies, including small and medium-sized enterprises (‘SMEs') and start-ups, will undertake 68 projects in research, innovation, and deployment of microelectronics and communication technologies across th... » read more

Week In Review: Design, Low Power

By Jesse Allen - 09 Jun, 2023 - Comments: 0

Renesas Electronics completed its acquisition of Panthronics, a fabless company specializing in near-field communication (NFC) wireless products. Renesas has already incorporated Panthronics NFC technology into several solution reference designs for applications such as payment, IoT, asset tracking, and smart meters. The European Commission announced new funding for the semiconductor and mic... » read more

Programming Processors In Heterogeneous Architectures

By Ann Mutschler - 08 Jun, 2023 - Comments: 0

Programming processors is becoming more complicated as more and different types of processing elements are included in the same architecture. While systems architects may revel in the number of options available for improving power, performance, and area, the challenge of programming functionality and making it all work together is turning out to be a major challenge. It involves multiple pr... » read more

How To Address The Top 5 Silicon Startup Challenges

By Neil Parris - 08 Jun, 2023 - Comments: 0

From our 30 years of experience, Arm understands that designing silicon can be complex and expensive. Against the backdrop of global supply chain issues and wider economic challenges, today’s climate can be challenging for the tech industry, particularly those creating the next wave of silicon products. Startups are looking for every opportunity to maximize their success with their first t... » read more

Blog Review: June 7

By Jesse Allen - 07 Jun, 2023 - Comments: 0

Synopsys' Kenneth Larsen and Powerchip's S.Z. Chang explore wafer-on-wafer (WoW) and chip-on-wafer (CoW), 3D hybrid bonding schemes that can be used to stack memory on logic with shorter signal transmission distance at no wasted power and more interconnect and bandwidth density. In a podcast, Siemens' Conor Peick, Nand Kochhar, and Mark Sampson chat about how companies can address growing co... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.