What’s Required To Secure Chips

By Ed Sperling - 06 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about how to verify that a semiconductor design will be secure, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker Verification. ... » read more

Blog Review: April 5

By Jesse Allen - 05 Apr, 2023 - Comments: 0

Synopsys's Gordon Cooper argues that AI transformer models, initially developed for natural language processing such as translation and question answering, are starting to make inroads in the computer vision application landscape and changing the direction of deep-learning architectures. Siemens' Patrick Hope shows how to identify opportunities to optimize a PCB design through the creation o... » read more

Mechanical Challenges Rise With Heterogeneous Integration

By Ed Sperling - 03 Apr, 2023 - Comments: 0

Companies integrating multiple chips or chiplets into a package will need to address structural and other mechanical engineering issues, but gaps in the design tools, new materials and interconnect technologies, and a shortage of expertise are making it difficult to address those issues. Throughout most of the history of the semiconductors, few people outside of foundries worried about struc... » read more

Do Necessary Tools Exist For RISC-V Verification?

By Brian Bailey - 30 Mar, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

Options Widen For Optimizing IoT Designs

By John Koon - 29 Mar, 2023 - Comments: 0

Creating a successful IoT design requires a deep understanding of the use cases, and a long list of tradeoffs among various components and technologies to provide the best solution at the right price point. Maximizing features and functions while minimizing costs is an ongoing balancing act, and the number of choices can be overwhelming. The menu includes SoC selection, OS and software proto... » read more

Blog Review: March 29

By Jesse Allen - 29 Mar, 2023 - Comments: 0

Siemens' Heather George suggests adopting a shift-left strategy for complex designs that integrate multiple dies into a package and examines the challenges and opportunities for performing comprehensive tests on 2.5D and 3D IC designs. Synopsys' Shekhar Kapoor notes that when considering whether a system will perform as intended, techniques that work well for monolithic SoCs may not be as we... » read more

Blog Review: March 22

By Jesse Allen - 22 Mar, 2023 - Comments: 0

Siemens EDA's Dan Yu warns that the unavailability of verification data is slowing down the development of advanced machine learning for verification, with valuable data assets either siloed among different team members or projects or simply discarded due to the lack of analytic techniques to extract value from them. Synopsys' Richard Solomon and Dana Neustadter point to the need for hardwar... » read more

Blog Review: March 15

By Jesse Allen - 15 Mar, 2023 - Comments: 0

Siemens EDA's Dan Yu finds that high-quality, well-connected mass data are crucial to the success of applying machine learning to verification and recommends teams pivot to a data-centric workflow. Synopsys' Shankar Krishnamoorthy suggests that deploying AI-driven chip design and verification can free teams from iterative work, letting them focus instead on product differentiation and PPA en... » read more

Week In Review: Auto, Security, Pervasive Computing

By Linda Christensen - 10 Mar, 2023 - Comments: 0

Rambus will begin selling Arm's CryptoCell embedded security platform and CryptoIsland root-of-trust cores, setting the stage for a much broader push by Rambus into security for a wide range of connected devices, and ultimately into security as a service. Under the terms of the deal, Rambus' customers will be able to license Arm IP directly from Rambus. For Arm's existing customers, there will ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 10 Mar, 2023 - Comments: 0

Arm is expected to list solely on a U.S. stock exchange when it goes public again later this year, forgoing the London Stock Exchange for now, the BBC reports. Global investment banks expect the offering to value the company between $30 billion and $70 billion, according to Bloomberg. Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for cont... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.