tag: ASML

193i Lithography Takes Center Stage…Again
By Gregory Haley - 15 Jun, 2023 - Comments: 0

Cutting-edge lithography to create smaller features increasingly is being supplemented by improvements in lithography for mature process nodes, both of which are required as SoCs and complex chips are decomposed and integrated into advanced packages. Until the 7nm era, the primary goal of leading-edge chipmakers was to pack everything onto a single system-on-chip (SoC) using the same process... » read more

Managing Yield With EUV Lithography And Stochastics
By Katherine Derbyshire - 18 May, 2023 - Comments: 1

Identifying issues that actually affect yield is becoming more critical and more difficult at advanced nodes, but there is progress. Although they are closely related, yield management and process control are not the same. Yield management seeks to maximize the number of functioning devices at the end of the line. Process control focuses on keeping each individual device layer within its des... » read more

Chip Industry’s Technical Paper Roundup: Apr. 18
By Linda Christensen - 18 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

EUV Lithography: Results of Single Particle Volume Charging Processes in EUV Exposure Environment With Focus On Afterglow Effects
By Technical Paper Link - 12 Apr, 2023 - Comments: 0

A new technical paper titled "Particle charging during pulsed EUV exposures with afterglow effect" was published by researchers at ASML, ISTEQ B.V., and Eindhoven University of Technology. Abstract "The nanoparticle charging processes along with background spatial-temporal plasma profile have been investigated with 3DPIC simulation in a pulsed EUV exposure environment. It is found that the ... » read more

Challenges Grow For CD-SEMs At 5nm And Beyond
By Gregory Haley - 11 Apr, 2023 - Comments: 1

CD-SEM, the workhorse metrology tool used by fabs for process control, is facing big challenges at 5nm and below. Traditionally, CD-SEM imaging has relied on a limited number of image frames for averaging, which is necessary both to maintain throughput speeds and to minimize sample damage from the electron beam itself. As dimensions get smaller, these limitations result in higher levels of n... » read more

Week In Review: Design, Low Power
By Linda Christensen - 24 Mar, 2023 - Comments: 0

Renesas will acquire Panthronics, a fabless semiconductor company specializing in high-performance wireless products, expanding its reach into near-field communications for financial, IoT, asset tracking, wireless charging, and automotive applications. The two companies already had collaborated on designs for mobile point-of-sale terminals, wireless charging, and smart metering. Renesas also... » read more

Tech Forecast: Fab Processes To Watch Through 2040
By Laura Peters - 16 Mar, 2023 - Comments: 0

The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

New Challenges Emerge With High-NA EUV
By Katherine Derbyshire - 16 Mar, 2023 - Comments: 3

High numerical aperture EUV exposure systems are coming — as soon as 2025 by some estimates. Though certainly a less profound change than the introduction of extreme ultraviolet lithography, high-NA lithography still brings a new set of challenges for photoresists and related materials. With a higher numerical aperture, photons strike the wafer at a shallower angle. That requires thinner p... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing
By eBeam Initiative - 15 Mar, 2023 - Comments: 0

Published by the eBeam Initiative Member Companies (February 2023), this list of artificial intelligence (AI) systems used by member companies in their semiconductor manufacturing products shows progress. New examples of systems using AI include: image processing and parameter tuning in lithography tool mask metrology system B-SPline Control Point generation tool sem... » read more

Metrology Strategies For 2nm Processes
By Laura Peters - 07 Mar, 2023 - Comments: 3

Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

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