Automotive Bandwidth Issues Grow As Data Skyrockets

By Ann Mutschler - 02 Jun, 2022 - Comments: 0

Bandwidth requirements for future vehicles are set to explode as the amount of data moving within vehicles, between vehicles, and between vehicles and infrastructure, continues to grow rapidly. That data will be necessary for a variety of functions, some of which are here today and many of which are still in development. On the safety side, that includes everything from early warning systems... » read more

Measuring Frequency Dependence Across 5G mmWave Bands (NIST)

By Technical Paper Link - 10 May, 2022 - Comments: 0

New research paper from NIST, "Methodology for Measuring the Frequency Dependence of Multipath Channels Across the Millimeter-Wave Spectrum." Abstract "Millimeter-wave (mmWave) communications promise Gigabit/s data rates thanks to the availability of large swaths of bandwidth between 10–100 GHz. Although cellular operators prefer the lower portions of the spectrum due to popular belief ... » read more

1.6 Tb/s Ethernet Challenges

By Ed Sperling - 16 Nov, 2021 - Comments: 0

Moving data at blazing fast speeds sounds good in theory, but it raises a number of design challenges. John Swanson, senior product marketing manager for high-performance computing digital IP at Synopsys, talks about the impact of next-generation Ethernet on switches, the types of data that need to be considered, the causes of data growth, and the size and structure of data centers, both in the... » read more

HBM3: Big Impact On Chip Design

By Ann Mutschler - 14 Oct, 2021 - Comments: 0

An insatiable demand for bandwidth in everything from high-performance computing to AI training, gaming, and automotive applications is fueling the development of the next generation of high-bandwidth memory. HBM3 will bring a 2X bump in bandwidth and capacity per stack, as well as some other benefits. What was once considered a "slow and wide" memory technology to reduce signal traffic dela... » read more

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems

By Technical Paper Link - 11 Aug, 2021 - Comments: 0

Find Technical Paper link here. Abstract: "Graphics Processing Units (GPUs) are ubiquitous components used across the range of today’s computing platforms, from phones and tablets, through personal computers, to high-end server class platforms. With the increasing importance of graphics and video workloads, recent processors are shipped with GPU devices that are integrated on the same chi... » read more

Streaming Scan Network

By Siemens EDA - 12 Jul, 2021 - Comments: 0

The traditional approach to moving scan test data from chip-level pins to core-level scan channels is under pressure due to the dramatic rise in design size, design complexity, and test adaptation. In the traditional approach to delivering scan test data to cores, each core requires a dedicated connection to chip-level pins, which doesn’t allow for much flexibility, as the dependencies betwee... » read more

Next-Gen SerDes Roadmap

By Ed Sperling - 25 May, 2021 - Comments: 0

An explosion in data is causing a series of successive bottlenecks in the data center. Priyank Shukla, product marketing manager for high-speed SerDes IP at Synopsys, digs into the performance roadmap for moving data within server racks and between different racks, where the bottlenecks are today, and how they will be addressed in the future. Related SerDes Knowledge Center Top stories... » read more

Cloud Vs. On-Premise Analytics

By Anne Meixner - 09 Mar, 2021 - Comments: 2

The immense and growing volume of data generated in chip manufacturing is forcing chipmakers to rethink where to process and store that data. For fabs and OSATs, this decision is not one to be taken lightly. The proprietary nature of yield, performance, and other data, and corporate policies to retain tight control of that data, have so far limited outsourcing to the cloud. But as the amount... » read more

Usage Models Driving Data Center Architecture Changes

By Ann Mutschler - 11 Feb, 2021 - Comments: 0

Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

The Impact Of 5G On Silicon Design

By Ron Lowman - 07 Jan, 2021 - Comments: 0

5G, the next-generation of mobile broadband, is driving tremendous increases in data throughput for mobile applications by introducing carrier aggregation, massive MIMO, advanced modulation, and high bandwidth channels in the mmWave spectrum. However, 5G and its governing body, 3GPP, has very high expectations to expand its capabilities well beyond the mobile market, and move into many new area... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?