LAB Flip Chip Reflow Process Robustness Prediction By Thermal Simulation

By Gabriel Chang - 16 Nov, 2023 - Comments: 0

By Gabriel Chang and Ricky Zang Nowadays, there are many interconnects in IC chips. One of the packaging goals is to connect an IC to the next level of subsystem circuitry (package substrates/print circuit boards). Mass reflow (MR) of solder joints is a widely adapted and stable process in the industry. The applications of MR include flip chip, ball mounting, surface mount technology (SMT), ... » read more

Reverse Laser Assisted Bonding (R-LAB) Technology For Chiplet Module Bonding On Substrate

By SeokHo Na - 21 Sep, 2023 - Comments: 0

By SeokHo Na, MinHo Gim, GaHyeon Kim, DongSu Ryu, DongJoo Park, and JinYoung Kim In the recent semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting and experiencing rapid growth. As most of these applications require high performance, single-die Flip Chip packages... » read more

Nine Essential Criteria To Achieve A Successful Bonding Process

By Brewer Science - 14 Aug, 2023 - Comments: 0

A photosensitive permanent bonding material enables the creation of high-quality permanent bonds between dissimilar materials used in the creation of MEMS and sensors. Having a thorough understanding of the materials and product performance is crucial to the success of the end application. In this article, we explore nine criteria used to evaluate a polymeric photosensitive permanent bonding ma... » read more

A Technical Guide To Selecting A Photosensitive Permanent Bonding Material

By Jessica Albright - 15 Jun, 2023 - Comments: 0

Next Gen Laser Assisted Bonding (LAB) Technology

By SeokHo Na - 18 May, 2023 - Comments: 0

In the semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting rapid growth. Among them, CPU data processing, AI and data cloud require much higher power consumption than smart phones or tablets. For the higher power applications, Flip Chip ball grid array (FCBGA) or 2.... » read more

Surface-Activated ALD For Room-Temperature Bonding of Al2O3

By Technical Paper Link - 03 Apr, 2023 - Comments: 0

A new technical paper titled "Room-temperature bonding of Al2O3 thin films deposited using atomic layer deposition" was published by researchers at Kyushu University. Abstract "In this study, room-temperature wafer bonding of Al2O3 thin films on Si thermal oxide wafers, which were deposited using atomic layer deposition (ALD), was realized using the surface-activated bonding (SAB) metho... » read more

Managing Thermal-Induced Stress In Chips

By Karen Heyman - 16 Feb, 2023 - Comments: 0

At advanced nodes and in the most advanced packages, physics is no one's friend. Escalating density, smaller features, and thinner dies make it more difficult to dissipate heat, and they increase mechanical stress. On the flip side, thinner dielectrics and tighter spaces make it more difficult to insulate and protect against that heat, and in conjunction with those smaller features and higher d... » read more

Unknowns And Challenges In Advanced Packaging

By Ed Sperling - 19 Jan, 2023 - Comments: 0

Dick Otte, CEO of Promex Industries, sat down with Semiconductor Engineering to talk about unknowns in material properties, the impact on bonding, and why environmental factors are so important in complex heterogeneous packages. What follows are excerpts of that conversation. SE: Companies have been designing heterogeneous chips to take advantage of specific applications or use cases, but th... » read more

New Method to Measure, At The Wafer Scale, Direct Bonding Energies (CEA-LETI)

By Technical Paper Link - 12 Dec, 2022 - Comments: 0

A new technical paper titled "Double cantilever beam bonding energy measurement using confocal IR microscopy" was published by researchers at Univ. Grenoble Alpes, CEA-LETI and SOITEC, Parc Technologique des Fontaines. "A new technique is assessed in order to measure, at the wafer scale, direct bonding energies. It is derived from the standard Double Cantilever Beam (DCB) method and uses int... » read more

Hot Trends In Semiconductor Thermal Management

By Karen Heyman - 17 Nov, 2022 - Comments: 1

Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

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Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: bonding