tag: Brewer Science

CEO Outlook: 2021
By Ed Sperling - 04 Jan, 2021 - Comments: 0

The new year will be one of significant transition and innovation for the chip industry, but there are so many new applications and market segments that broad generalizations are becoming less meaningful. Unlike in years past, where sales of computers or smart phones were a good indication of how the chip industry would fare, end markets have both multiplied and splintered, greatly increasin... » read more

Variation Threat In Advanced Nodes, Packages Grows
By Ed Sperling - 21 Dec, 2020 - Comments: 0

Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

EUV Challenges And Unknowns At 3nm and Below
By Mark LaPedus - 19 Nov, 2020 - Comments: 1

The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Improving EUV Underlayer Coating Defectivity Using Point-Of-Use Filtration
By Brewer Science - 18 Nov, 2020 - Comments: 0

Authors: Aiwen Wu (Entegris, Inc. — United States), Hareen Bayana (Entegris GmbH — Germany), Philippe Foubert (imec — Belgium), Andrea Chacko and Douglas Guererro (Brewer Science, Inc. — United States). This paper describes efforts to leverage different filtration parameters, including retention ratings and membrane materials, to understand their impact on EUV underlayer coating defe... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 13 Nov, 2020 - Comments: 0

Automotive Cadence achieved ASIL Level B in support of D (ASIL B(D))-compliant certification for its Tensilica ConnX B10 and ConnX B20 DSPs, which are designed for automotive radar, lidar, and vehicle-to-everything (V2X). SGS-TÜV Saar certified that the DSPs have support for random hardware faults and systematic faults. Synopsys is acquiring Moortec, whose process, voltage, and temperature... » read more

Si Hardmask (Si-HM), EUV And Zero Defects
By Hao Lee - 26 Oct, 2020 - Comments: 0

The multilayer system used in lithography consists of a planarizing carbon layer beneath a hardmask etch-transferring layer and capped with a standard photoresist coating. In the past, Brewer Science has discussed in-depth how the multilayer system helped to extend ArF (193 nm) immersion lithography to be able to print and transfer ever-shrinking features, ensuring enough process window especia... » read more

Defect Challenges Grow For IC Packaging
By Mark LaPedus - 22 Oct, 2020 - Comments: 0

Several vendors are ramping up new inspection equipment based on infrared, optical, and X-ray technologies in an effort to reduce defects in current and future IC packages. While all of these technologies are necessary, they also are complementary. No one tool can meet all defect inspection requirements. As a result, packaging vendors may need to buy more and different tools. For years, p... » read more

Momentum Builds For Advanced Packaging
By Mark LaPedus - 17 Sep, 2020 - Comments: 0

The semiconductor industry is stepping up its efforts in advanced packaging, an approach that is becoming more widespread with new and complex chip designs. Foundries, OSATs and others are rolling out the next wave of advanced packaging technologies, such as 2.5D/3D, chiplets and fan-out, and they are developing more exotic packaging technologies that promise to improve performance, reduce p... » read more

Development Of Planarizing Spin-On Carbon Materials For High-Temperature Processes
By Brewer Science - 20 Aug, 2020 - Comments: 0

Multilayer lithography is used for advanced semiconductor processes to pattern complex structures. As more and more procedures incorporate a high-temperature process, such as chemical vapor deposition (CVD), the need for thermally stable materials increases. For certain applications, a spin-on carbon (SOC) layer under the CVD layer is required to survive through a high-temperature process. ... » read more

Finding Defects With E-Beam Inspection
By Mark LaPedus - 20 Aug, 2020 - Comments: 0

Several companies are developing or shipping next-generation e-beam inspection systems in an effort to reduce defects in advanced logic and memory chips. Vendors are taking two approaches with these new e-beam inspection systems. One is a more traditional approach, which uses a single-beam e-beam system. Others, meanwhile, are developing newer multi-beam technology. Both approaches have thei... » read more

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