A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options: Comparing Bulk vs. SOI vs. DSOI Starting Substrates

By Coventor - 17 Jun, 2020 - Comments: 0

Sub-5 nm logic nodes will require an extremely high level of innovation to overcome the inherent real-estate limitations at this increased device density. One approach to increasing device density is to look at the vertical device dimension (z-direction), and stack devices on top of each other instead of conventionally side-by-side. The fabrication of a Complementary-Field Effect Transistor (CF... » read more

FD-SOI Vs. FinFETs

By Ed Sperling - 16 Apr, 2015 - Comments: 1

Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

IBM, Intel And TSMC Roll Out finFETs

By Mark LaPedus - 14 Dec, 2014 - Comments: 0

At the IEEE International Electron Devices Meeting (IEDM) in San Franciso, IBM, Intel and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) this week will separately present the latest details of their respective 16nm/14nm finFET technologies. As expected, Intel and TSMC will continue to use bulk CMOS. IBM will continue to go with rival silicon-on-insulator (SOI) technology. At IEDM, Intel ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 17 Oct, 2014 - Comments: 0

It’s official: IBM appears to be exiting the chip business. After months of talks, IBM has agreed to pay GlobalFoundries $1.5 billion to take Big Blue’s chip unit off its hands, according to reports from Bloomberg. IBM will also receive $200 million worth of assets, according to the reports. At the upcoming IEEE International Electron Devices Meeting (IEDM), Intel and IBM will present... » read more

Has The IC Industry Hit A ‘Red Brick Wall’?

By Mark LaPedus - 19 Jun, 2014 - Comments: 2

In the mid-1980s, the semiconductor industry was in a crisis. Chipmakers were looking for ways to break the magical one-micron barrier. Many thought X-ray lithography would be required to break the barrier, but as it turned out, traditional optical technology did the trick. And the industry marched on. Then, in 2000 or so, the IC industry was nearing the so-called “red brick wall,” which... » read more

FinFET Isolation: Bulk vs. SOI

By Various Writers - 15 May, 2013 - Comments: 1

Terry Hook of IBM recently contributed an article to ASN about FinFET isolation issues on bulk vs. SOI. It generated immense interest, and created lots of discussion on various LinkedIn groups. In case you missed it, here it is again. (This article is based on an in-depth presentation Terry gave at the SOI Consortium's Fully-Depleted Tech Workshop, held during VLSI-TSA in Taiwan, April 2... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer