tag: Cadence

Growing Challenges For Increasingly Connected Vehicles
By John Koon - 06 Apr, 2023 - Comments: 0

Automobiles will become increasingly connected over the next decade, but that connectivity will come at a price in terms of dollars, security, and constantly changing technology. Connectivity involves all parts of a vehicle. It includes everything from autonomous driving to in-cabin monitoring and connected infotainment. And it encompasses external sensors, IoT, V2X, over-the-air communicati... » read more

What’s Required To Secure Chips
By Ed Sperling - 06 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about how to verify that a semiconductor design will be secure, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker Verification. ... » read more

Predicting Hull Resistance Curve Using Marine CFD
By Veena Parthan - 06 Apr, 2023 - Comments: 0

In this user case, Marintek uses Fidelity Fine/Marine and Hexpress for resistance curve prediction of a planning hull and its validation against the model test cases. Team involved End User: Eloïse Croonenborghs, Research Scientist at MARINTEK, Maritime division, Trondheim, Norway Team Expert: Sverre Anders Alterskjær, Research Scientist at MARINTEK, Maritime division, Trondheim, Norway... » read more

Blog Review: April 5
By Jesse Allen - 05 Apr, 2023 - Comments: 0

Synopsys's Gordon Cooper argues that AI transformer models, initially developed for natural language processing such as translation and question answering, are starting to make inroads in the computer vision application landscape and changing the direction of deep-learning architectures. Siemens' Patrick Hope shows how to identify opportunities to optimize a PCB design through the creation o... » read more

Mechanical Challenges Rise With Heterogeneous Integration
By Ed Sperling - 03 Apr, 2023 - Comments: 0

Companies integrating multiple chips or chiplets into a package will need to address structural and other mechanical engineering issues, but gaps in the design tools, new materials and interconnect technologies, and a shortage of expertise are making it difficult to address those issues. Throughout most of the history of the semiconductors, few people outside of foundries worried about struc... » read more

Week In Review: Automotive, Security and Pervasive Computing
By Linda Christensen - 31 Mar, 2023 - Comments: 0

The Biden administration uncorked a fueling station locator tool to help consumers locate charging stations by fuel type, a plan to install 24,000 charging stations at federal facilities by next fiscal year, as well as other clean energy commitments. Source: Department of Energy: Alternative Fuels Data Center & Station Locator Europe is making progress on a plan that requires all ... » read more

Do Necessary Tools Exist For RISC-V Verification?
By Brian Bailey - 30 Mar, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

Options Widen For Optimizing IoT Designs
By John Koon - 29 Mar, 2023 - Comments: 0

Creating a successful IoT design requires a deep understanding of the use cases, and a long list of tradeoffs among various components and technologies to provide the best solution at the right price point. Maximizing features and functions while minimizing costs is an ongoing balancing act, and the number of choices can be overwhelming. The menu includes SoC selection, OS and software proto... » read more

Blog Review: March 29
By Jesse Allen - 29 Mar, 2023 - Comments: 0

Siemens' Heather George suggests adopting a shift-left strategy for complex designs that integrate multiple dies into a package and examines the challenges and opportunities for performing comprehensive tests on 2.5D and 3D IC designs. Synopsys' Shekhar Kapoor notes that when considering whether a system will perform as intended, techniques that work well for monolithic SoCs may not be as we... » read more

Chip Industry’s Technical Paper Roundup: Mar. 28
By Linda Christensen - 28 Mar, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=89 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

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