EDA Gaps At The Leading Edge


Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

Who Does Processor Validation?


Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds of heterogenous processing elements crammed into a single chip or package. Companies have extensive verification methodologies, but not for validation. Verification is a process of ensuring that an implementation matches a specif... » read more

Week In Review: Design, Low Power


RISC-V RISC-V International announced four new specification and extension approvals. Efficient Trace for RISC-V defines an approach to processor tracing that uses a branch trace. RISC-V Supervisor Binary Interface architects a firmware layer between the hardware platform and the operating system kernel using an application binary interface in supervisor mode to enable common platform services... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility The U.S. Department of Transportation’s National Highway Traffic Safety Administration (NHTSA) published a notice of proposed rulemaking (NPRM) to change the regulations on event data recorders (EDRs) to extend the EDR recording period for “timed data metrics from 5 seconds of pre-crash data at a frequency of 2 Hz to 20 seconds of pre-crash data at a frequency of 10 Hz... » read more

Why Hardware-Dependent Software Is So Critical


Hardware and software are two sides of the same coin, but they often live in different worlds. In the past, hardware and software rarely were designed together, and many companies and products failed because the total solution was unable to deliver. The big question is whether the industry has learned anything since then. At the very least, there is widespread recognition that hardware-depen... » read more

Embedded World 2022: Structural Changes In Ecosystems


As my train approaches Nuremberg for the Embedded World conference—which this year is in June versus its usual timing in February—I am reviewing my past related blogs back to 2012. My complaints about the cold weather have been a common thread in past blogs, but with a weather forecast of 28°C/80°F, I will probably ask for cooler weather at the end of the day. Past key themes included tec... » read more

EDA Embraces Big Data Amid Talent Crunch


The semiconductor industry’s labor crunch finally has convinced chip designers to bet big money on big data. As recently as 2016, executives weren’t sure there was a market for big data approaches to electronic design automation. The following year, utilization of big data remained stuck in its infancy. And in 2018, Semiconductor Engineering questioned why the EDA sector wasn’t investi... » read more

Blog Review: June 22


Arm's Andrew Pickard checks out a project at Sorbonne Université in Paris that is using the Cortex-M3 processor source code to model what is happening in the hardware at the microarchitectural level and find ways to prevent side-channel leakage of sensitive cryptographic information. Cadence's Paul McLellan digs into the development of high-NA EUV lithography and some of the challenges ahea... » read more

Overcoming Signal, Power, And Thermal Challenges Implementing GDDR6 Interfaces


Graphics processing units (GPUs) and graphics double data rate (GDDR) memory interfaces are essential to graphics cards, game consoles, high-performance computing (HPC), and machine learning applications. These interfaces enable data transfer speeds of over 665GB per second today and will continue to support well over a terabyte per second (TBps) in next-generation GDDR interfaces. Signal integ... » read more

Designing and Simulating Low-Voltage CMOS Circuits Using Four-Parameter Model


New technical paper titled "Bridging the Gap between Design and Simulation of Low-Voltage CMOS Circuits" from researchers at Federal University of Santa Catarina, Brazil. Abstract "This work proposes a truly compact MOSFET model that contains only four parameters to assist an integrated circuits (IC) designer in a design by hand. The four-parameter model (4PM) is based on the advanced com... » read more

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