How Hard Is FD-SOI Design?

By Ann Mutschler - 21 May, 2015 - Comments: 0

Fully-depleted silicon-on-insulator ([getkc id="220" kc_name="FD-SOI"]) manufacturing technology reached of point of readiness for mass production at the end of March. Along with that, it’s now clear that while there are some impacts on the design flow, those impacts are not game changers. For one thing, the tools required are the same ones currently used for 28nm planar bulk CMOS. The onl... » read more

Drill Down: Embedded NVM Technology

By Ernest Worthman - 02 Apr, 2015 - Comments: 0

Many of the next-generation devices that will be seen on the IoT/E will have power, footprint, and electronic constraints as never before. Electronic flash memories (eFLASH), and their derivatives are seen as a realistic solution to many of these design constraints for small form factor and simple IoE devices. “NVM will be very important for the IoE from the perspective of saving power," ... » read more

Issues And Options At 5nm

By Mark LaPedus - 19 Mar, 2015 - Comments: 0

While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

Modeling High-Performance Analog And RF Circuits In Nanometer-Scale CMOS

By Mentor, a Siemens Business - 12 Mar, 2015 - Comments: 0

By Mick Tegethoff and David Lee Today’s consumer, communication, and computer electronic devices have clocks, communication interfaces, and high-speed signal-conditioning circuits that operate at radio frequencies (RF). Providing price-competitive products often requires monolithic integration of these circuits in low-power nanometer-scale bulk CMOS silicon. This is a worst-case scenario for... » read more

Still Waiting For III-V Chips

By Mark LaPedus - 19 Feb, 2015 - Comments: 0

For years, chipmakers have been searching for an alternative material to replace traditional silicon in the channel for advanced CMOS devices at 7nm and beyond. There’s a good reason, too: At 7nm, silicon will likely run out of steam in the channel. Until recently, chipmakers were counting on III-V materials for the channels, at least for NFET. Compared to silicon, III-V materials provide ... » read more

And the Winner is…

By Brian Bailey - 18 Dec, 2014 - Comments: 0

Semiconductor Engineering now has its first full year under its belt, and I have to say it has been an incredible year. Not only did we exceed a million page views in our first year, but we also got started on the Knowledge Center, an endeavor the likes of which has never been attempted in our industry. It is still very young and has a lot of growing up to do, but it is a wonderful start. We wo... » read more

IBM, Intel And TSMC Roll Out finFETs

By Mark LaPedus - 14 Dec, 2014 - Comments: 0

At the IEEE International Electron Devices Meeting (IEDM) in San Franciso, IBM, Intel and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) this week will separately present the latest details of their respective 16nm/14nm finFET technologies. As expected, Intel and TSMC will continue to use bulk CMOS. IBM will continue to go with rival silicon-on-insulator (SOI) technology. At IEDM, Intel ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 17 Oct, 2014 - Comments: 0

It’s official: IBM appears to be exiting the chip business. After months of talks, IBM has agreed to pay GlobalFoundries $1.5 billion to take Big Blue’s chip unit off its hands, according to reports from Bloomberg. IBM will also receive $200 million worth of assets, according to the reports. At the upcoming IEEE International Electron Devices Meeting (IEDM), Intel and IBM will present... » read more

Moving To Wide Bandgap Chips

By Kenji Tsuda - 05 Sep, 2014 - Comments: 0

The search for new materials to replace CMOS has been in full swing for decades, but in spite of successes in limited niche markets, bulk CMOS remains king. That’s beginning to change, however, as CMOS runs out of steam at advanced process nodes and as the priorities of chipmakers change from pure performance to energy efficiency. And for such applications as automotive electronics for hyb... » read more

Challenges In 3D Resists

By Katherine Derbyshire - 24 Mar, 2014 - Comments: 2

3D integration straddles the line between CMOS fabs and packaging and assembly houses. Depending on the structure being fabricated, the most appropriate process might be more “CMOS-like” or more “package-like.” For example, in CMOS fabs lithography means spin-on photoresist, exposed by a high precision stepper. Inherent in this approach is an assumption that the wafer surface is flat... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: CMOS