tag: Coventor

Blog Review: May 25
By Jesse Allen - 25 May, 2022 - Comments: 0

Coventor's Michael Hargrove points to the need for a new generation of deep-submicron CMOS circuits that can operate at deep-cryogenic temperatures to achieve a quantum integrated circuit where the array of qubits is integrated on the same chip as the CMOS electronics required to read the state of the qubits. Ansys' Marc Swinnen warns about dynamic voltage drop as ultra-low supply voltages, ... » read more

There Is Plenty Of Room At The Top: Imagining Miniaturized Electro-Mechanical Switches In Low-Power Computing Applications
By Gerold Schröpfer - 19 May, 2022 - Comments: 0

The first computers were built using electro-mechanical components, unlike today’s modern electronic systems. Alan Turing’s cryptanalysis multiplier and Konrad Zuse’s Z2 were invented and built in the first half of the 20th century, and were among the first computers ever constructed. Electro-mechanical switches and relays performed logic operations in these machines. Even after computers... » read more

Blog Review: May 18
By Jesse Allen - 18 May, 2022 - Comments: 0

Coventor's Gerold Schropfer considers taking an approach from the early days of computing and using MEMS technology to create computers based on micro-scale electro-mechanical logic and memory for emerging low-energy computing applications such as autonomous sensor nodes and edge computing. Synopsys' Morten Christiansen explains how USB4 differs from USB 3.2, allowing simultaneous host-to-ho... » read more

Blog Review: May 11
By Jesse Allen - 11 May, 2022 - Comments: 0

Ansys' Vidyu Challa checks out how to identify the most important battery metrics for a particular application and trade these off against others with a focus on the important considerations when selecting the right battery for a consumer application, such as rechargeability, energy density, power density, shelf life, safety, form factor, cost, and flexibility. Cadence's Shyam Sharma points ... » read more

BEOL Integration For The 1.5nm Node And Beyond
By Assawer Soussou - 25 Apr, 2022 - Comments: 0

As we approach the 1.5nm node and beyond, new BEOL device integration challenges will be presented. These challenges include the need for smaller metal pitches, along with support for new process flows. Process modifications to improve RC performance, reduce edge placement error, and enable challenging manufacturing processes will all be required. To address these challenges, we investigated th... » read more

Yield Enhancement By Virtual Fabrication
By Coventor - 20 Apr, 2022 - Comments: 0

This paper provides an example of yield enhancement using virtual fabrication. A 6 transistors based static random access memory example on 7nm node technology was used in this case study. Yield loss caused by via contact-metal edge placement error was modeled and analyzed. The results show that yield can be enhanced from 48.4% to 99.0% through process window optimization and improved specifica... » read more

Blog Review: April 13
By Jesse Allen - 13 Apr, 2022 - Comments: 0

Synopsys' Scott Durrant, Priyank Shukla, Mitch Heins, and Jigesh Patel provide a brief overview of the history of copper and optical interconnects used in data centers, the limitations of existing interconnect solutions, and the future of co-packaged optics. Siemens' Trey Reeser finds that it's not only necessary for semiconductor companies to address the safety and security of products for ... » read more

Blog Review: April 6
By Jesse Allen - 06 Apr, 2022 - Comments: 0

Synopsys' Ron Lowman considers the increase in specialized AI IP in SoCs, including the different aspects within AI classifications, markets that are driving its growth, key SoC design challenges, and nurturing SoC designs beyond integration. Siemens' Joe Hupcey III finds that the only way to be completely sure that RISC-V RTL is free of any natural or malicious surprises is to apply exhaust... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 18 Mar, 2022 - Comments: 0

Chipmakers, OEMs Intel continues to build more fabs. First, the company announced fabs in Arizona and then Ohio. Now, Intel plans to invest up to €80 billion in the European Union over the next decade. As part of the effort, Intel plans to build two semiconductor fabs in Magdeburg, Germany. Construction is expected to begin in the first half of 2023 and production planned to come online in 2... » read more

Accelerating Semiconductor Process Development Using Virtual Design Of Experiments
By Qingpeng Wang - 17 Mar, 2022 - Comments: 0

Design of Experiments (DOE) are a powerful concept in semiconductor engineering research and development. DOEs are sets of experiments used to explore the sensitivity of experimental variables and their effect on final device performance. A well-designed DOE can help an engineer achieve a targeted semiconductor device performance using a limited number of experimental wafer runs. However, in se... » read more

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