Scaling, Advanced Packaging, Or Both


Chipmakers are facing a growing number of challenges and tradeoffs at the leading edge, where the cost of process shrinks is already exorbitant and rising. While it's theoretically possible to scale digital logic to 10 angstroms (1nm) and below, the likelihood of a planar SoC being developed at that nodes appears increasingly unlikely. This is hardly shocking in an industry that has heard pr... » read more

Quantum Computers And CMOS Semiconductors: A Review And Future Predictions


With the advent of quantum computing, the need for peripheral fault-tolerant logic control circuitry has reached new heights. In classical computation, the unit of information is a “1” or “0”. In quantum computers, the unit of information is a qubit which can be characterized as a “0”, “1”, or a superposition of both values (known as a “superimposed state”). The control c... » read more

Ultra-Low Resonance Frequency MEMS Gravimeter With Off-Resonance Closed-Loop Control


This paper reports on a MEMS gravimeter that has a closed-loop system to maintain an ultra-low resonance frequency of 1Hz. The low resonance frequency is attained by using a spring that is the resultant of positive mechanical stiffnesses and negative electrical stiffnesses. Voltage-tunability of the electrical stiffness enables ultra-small and tunable total stiffness. To attain a quick response... » read more

Blog Review: June 15


Ansys' Vidyu Challa considers common primary, or single-use, battery chemistries and how they affect that many important cell properties, such as energy density, flammability and safety, available cell constructions, temperature range, and shelf life. Synopsys' Rimpy Chugh and Rohit Kumar Ohlayan discuss some of the challenges arising from static linting of code, shifting linting left in the... » read more

Blog Review: May 25


Coventor's Michael Hargrove points to the need for a new generation of deep-submicron CMOS circuits that can operate at deep-cryogenic temperatures to achieve a quantum integrated circuit where the array of qubits is integrated on the same chip as the CMOS electronics required to read the state of the qubits. Ansys' Marc Swinnen warns about dynamic voltage drop as ultra-low supply voltages, ... » read more

There Is Plenty Of Room At The Top: Imagining Miniaturized Electro-Mechanical Switches In Low-Power Computing Applications


The first computers were built using electro-mechanical components, unlike today’s modern electronic systems. Alan Turing’s cryptanalysis multiplier and Konrad Zuse’s Z2 were invented and built in the first half of the 20th century, and were among the first computers ever constructed. Electro-mechanical switches and relays performed logic operations in these machines. Even after computers... » read more

Blog Review: May 18


Coventor's Gerold Schropfer considers taking an approach from the early days of computing and using MEMS technology to create computers based on micro-scale electro-mechanical logic and memory for emerging low-energy computing applications such as autonomous sensor nodes and edge computing. Synopsys' Morten Christiansen explains how USB4 differs from USB 3.2, allowing simultaneous host-to-ho... » read more

Blog Review: May 11


Ansys' Vidyu Challa checks out how to identify the most important battery metrics for a particular application and trade these off against others with a focus on the important considerations when selecting the right battery for a consumer application, such as rechargeability, energy density, power density, shelf life, safety, form factor, cost, and flexibility. Cadence's Shyam Sharma points ... » read more

BEOL Integration For The 1.5nm Node And Beyond


As we approach the 1.5nm node and beyond, new BEOL device integration challenges will be presented. These challenges include the need for smaller metal pitches, along with support for new process flows. Process modifications to improve RC performance, reduce edge placement error, and enable challenging manufacturing processes will all be required. To address these challenges, we investigated th... » read more

Yield Enhancement By Virtual Fabrication


This paper provides an example of yield enhancement using virtual fabrication. A 6 transistors based static random access memory example on 7nm node technology was used in this case study. Yield loss caused by via contact-metal edge placement error was modeled and analyzed. The results show that yield can be enhanced from 48.4% to 99.0% through process window optimization and improved specifica... » read more

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