Week In Review: Manufacturing, Test


Fabs Intel has announced plans for an initial investment of more than $20 billion in the construction of two new leading-edge fabs in Ohio. Planning for the first two factories will start immediately, with construction expected to begin late in 2022. Production is expected to come online in 2025. As part of the announcement, Air Products, Applied Materials, Lam Research and Ultra Clean Technol... » read more

The Effect Of Pattern Loading On BEOL Yield And Reliability During Chemical Mechanical Planarization


Chemical mechanical planarization (CMP) is required during semiconductor processing of many memory and logic devices. CMP is used to create planar surfaces and achieve uniform layer thickness during semiconductor manufacturing, and to optimize the device topology prior to the next processing step. Unfortunately, the surface of a semiconductor device is not uniform after CMP, due to different re... » read more

Expanding Advanced Packaging Production In The U.S.


The United States is taking the first steps toward bringing larger-scale IC packaging production capabilities back to the U.S. as supply chain concerns and trade tensions grow. The U.S. is among the leaders in developing packages, especially new and advanced forms of the technology that promise to shake up the semiconductor landscape. And while the U.S. has several packaging vendors, North A... » read more

Blog Review: Jan. 5


Cadence's Paul McLellan listens in on the challenges Tesla sees in manufacturing batteries for electric vehicles at scale and the types of battery chemistries it are currently using. Synopsys' Mark Kahan finds out the launch steps involved with the James Webb Space Telescope and the role of optical design software in creating the new instruments for Near IR and Mid IR sensing. Siemens' An... » read more

Week In Review: Manufacturing, Test


Chipmakers Chip investments in Malaysia got a shot in the arm this week. First, Intel has announced plans to invest more than RM30 billion, or US$7 billion, within its Malaysian packaging and test facilities. The additional investment will help expand Intel Malaysia’s operations across Penang and Kulim. This new investment is expected to create over 4,000 Intel jobs as well as over 5,000 con... » read more

Understanding Electrical Line Resistance At Advanced Semiconductor Nodes


When evaluating shrinking metal linewidths in advanced semiconductor devices, bulk resistivity is not the sole materials property for deriving electrical resistance. At smaller line dimensions, local resistivity is dominated by grain boundary effects and surface scattering. Consequently, resistivity varies throughout a line, and resistance extraction needs to account for these secondary phenome... » read more

Blog Review: Dec. 8


Arm's Shidhartha Das introduces a method to achieve fast yet accurate power modelling for both design and runtime power introspection within the same unified framework using machine learning and data science approaches. Synopsys' Mike Borza warns that the semiconductor industry is facing a flood of counterfeit chips and why being aware of different types of semiconductor scams and tackling t... » read more

Blog Review: Dec. 1


Synopsys' Mike Gianfagna points to three events that created a fundamental shift in product development that has enabled rapid introduction of a wide range of new products. Siemens' Sagi Reuven considers some key challenges facing the supply chain and the impact on electronics manufacturers, from rising shipping costs to shortages of raw materials and transportation labor. Cadence's Frank... » read more

Blog Review: Nov. 24


Cadence's Paul McLellan introduces the theory and practice of datapath formal verification and explores two use cases of dot-product accumulate systolic design and hashing design. Siemens EDA's Rich Edelman shows that constructing an in-order UVM scoreboard doesn't have to be a difficult or complex task, and certainly simpler than replacing a laptop's keyboard. Synopsys' Gordon Cooper con... » read more

Using Process Modeling To Enhance Device Uniformity During Self-Aligned Quadruple Patterning


Despite the growing interest in EUV lithography, self-aligned quadruple patterning (SAQP) still holds many technical advantages in pattern consistency, simplicity, and cost. This is particularly true for very simple and periodic patterns, such as line & space patterns or hole arrays. The biggest challenge of SAQP is the inherently asymmetric mask shape. This asymmetry can create structural ... » read more

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