tag: Coventor

Blog Review: April 13
By Jesse Allen - 13 Apr, 2022 - Comments: 0

Synopsys' Scott Durrant, Priyank Shukla, Mitch Heins, and Jigesh Patel provide a brief overview of the history of copper and optical interconnects used in data centers, the limitations of existing interconnect solutions, and the future of co-packaged optics. Siemens' Trey Reeser finds that it's not only necessary for semiconductor companies to address the safety and security of products for ... » read more

Blog Review: April 6
By Jesse Allen - 06 Apr, 2022 - Comments: 0

Synopsys' Ron Lowman considers the increase in specialized AI IP in SoCs, including the different aspects within AI classifications, markets that are driving its growth, key SoC design challenges, and nurturing SoC designs beyond integration. Siemens' Joe Hupcey III finds that the only way to be completely sure that RISC-V RTL is free of any natural or malicious surprises is to apply exhaust... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 18 Mar, 2022 - Comments: 0

Chipmakers, OEMs Intel continues to build more fabs. First, the company announced fabs in Arizona and then Ohio. Now, Intel plans to invest up to €80 billion in the European Union over the next decade. As part of the effort, Intel plans to build two semiconductor fabs in Magdeburg, Germany. Construction is expected to begin in the first half of 2023 and production planned to come online in 2... » read more

Accelerating Semiconductor Process Development Using Virtual Design Of Experiments
By Qingpeng Wang - 17 Mar, 2022 - Comments: 0

Design of Experiments (DOE) are a powerful concept in semiconductor engineering research and development. DOEs are sets of experiments used to explore the sensitivity of experimental variables and their effect on final device performance. A well-designed DOE can help an engineer achieve a targeted semiconductor device performance using a limited number of experimental wafer runs. However, in se... » read more

Blog Review: March 2
By Jesse Allen - 02 Mar, 2022 - Comments: 0

Arm's Charlotte Christopherson checks out SpiNNaker1, a project to develop a massively parallel, manycore supercomputer architecture that mimicked the interactions of biological neurons, and its follow up, SpiNNaker2, a hybrid system that combines statistical AI and neuromorphic computing. Cadence's Paul McLellan looks at open and generic PDKs that can be used by researchers and in education... » read more

Blog Review: Feb. 23
By Jesse Allen - 23 Feb, 2022 - Comments: 0

Synopsys' Varun Agrawal looks at four new technologies have emerged to support the demands on 5G networks and applications, the challenges in validating all of those technologies together, and what's needed to perform end-to-end testing effectively for 5G O-RAN SoCs. Siemens EDA's Ray Salemi points to how FPGA retargeting could help address supply chain difficulties and some of the challenge... » read more

A Sub-1 Hz Resonance Frequency Resonator Enabled By Multi-Step Tuning For Micro-Seismometer
By Coventor - 17 Feb, 2022 - Comments: 0

We propose a sub-1 Hz resonance frequency MEMS resonator that can be used for seismometers. The low resonance frequency is achieved by an electrically tunable spring with an ultra-small spring constant. Generally, it is difficult to electrically fine-tune the resonance frequency at a near-zero spring constant because the frequency shift per voltage will diverge at the limit of zero spring const... » read more

Blog Review: Jan. 26
By Jesse Allen - 26 Jan, 2022 - Comments: 0

Arm's Mark Inskip shares how the Morello prototype architecture, aimed at improving the security of hardware, was developed, from the creation of the prototype architecture specification, followed by the design and implementation of a new CPU, through to the development of a new SoC, hardware platform, development tools, toolchains, and software. Cadence's Paul McLellan looks at how the RISC... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 21 Jan, 2022 - Comments: 0

Fabs Intel has announced plans for an initial investment of more than $20 billion in the construction of two new leading-edge fabs in Ohio. Planning for the first two factories will start immediately, with construction expected to begin late in 2022. Production is expected to come online in 2025. As part of the announcement, Air Products, Applied Materials, Lam Research and Ultra Clean Technol... » read more

The Effect Of Pattern Loading On BEOL Yield And Reliability During Chemical Mechanical Planarization
By Taeyon (TY) Oh - 20 Jan, 2022 - Comments: 0

Chemical mechanical planarization (CMP) is required during semiconductor processing of many memory and logic devices. CMP is used to create planar surfaces and achieve uniform layer thickness during semiconductor manufacturing, and to optimize the device topology prior to the next processing step. Unfortunately, the surface of a semiconductor device is not uniform after CMP, due to different re... » read more

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