What Future Processors Will Look Like

By Ed Sperling - 13 Jul, 2022 - Comments: 0

Mark Papermaster, CTO at AMD, sat down with Semiconductor Engineering to talk about architectural changes that are required as the benefits of scaling decrease, including chiplets, new standards for heterogeneous integration, and different types of memory. What follows are excerpts of that conversation. SE: What does a processor look like in five years? Is it a bunch of chips in a package? I... » read more

New End Markets, More Demand For Complex Chips

By Ed Sperling - 16 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss economic conditions and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front... » read more

Choosing Which Tasks To Optimize In Chips

By Brian Bailey - 28 Apr, 2022 - Comments: 0

The optimization of one or more tasks is an important aspect of every SoC created, but with so many options now on the table it is often unclear which is best. Just a few years ago, most people were happy to buy processors from the likes of Intel, AMD and Nvidia, and IP cores from Arm. Some even wanted the extensibility that came from IP cores like Tensilica and ARC. Then, in 2018, John Henn... » read more

Using GPUs In Semiconductor Manufacturing

By Ed Sperling - 25 Apr, 2022 - Comments: 0

Massive simulation and curvilinear shapes are forcing the photomask industry to rethink what types of chips work best. Aki Fujimura, CEO of D2S, talks about what happens when shapes printed on a mask are closer to what actually gets printed, how GPUs can be used to accelerate CPUs in single instruction/multiple data (SIMD) operations, and why pixel data is different from other data. » read more

Increasing Performance With Data Acceleration

By Martha DeGrasse - 14 Apr, 2022 - Comments: 0

Increasing demand for functions that require a relatively high level of acceleration per unit of data is providing a foothold for in-line accelerator cards, which could mean new opportunities for some vendors and a potential threat for others. For years, either CPUs, or CPUs with FPGA accelerators, met most market needs. But the rapid increase in the volume of data everywhere, coupled with t... » read more

Chiplets Enter The Supercomputer Race

By Mark LaPedus - 17 Mar, 2022 - Comments: 0

Several entities from various nations are racing each other to deliver and deploy chiplet-based exascale supercomputers, a new class of systems that are 1,000x faster than today’s supercomputers. The latest exascale supercomputer CPU and GPU designs mix and match complex dies in advanced packages, adding a new level of flexibility and customization for supercomputers. For years, various na... » read more

Assuring Reliable Processor Performance At Scale

By Uzi Baruch - 08 Mar, 2022 - Comments: 0

In today’s data center environment, resilience is key. Cloud providers are built on as-a-service business models, where uptime is critical to ensure their customers’ business continuity. Reputation and competitiveness require service at extremely high performance, low power, and increasing functionality, with zero tolerance for unplanned downtime or errors. If you’re a hyperscaler, o... » read more

Data Center Architectures In Flux

By Ann Mutschler - 24 Feb, 2022 - Comments: 0

Data center architectures are becoming increasingly customized and heterogeneous, shifting from processors made by a single vendor to a mix of processors and accelerators made by multiple vendors — including system companies' own design teams. Hyperscaler data centers have been migrating toward increasingly heterogeneous architectures for the past half decade or so, spurred by the rising c... » read more

Photomask Challenges At 3nm And Beyond

By Mark LaPedus - 25 Jan, 2022 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

The High But Often Unnecessary Cost Of Coherence

By Brian Bailey - 22 Dec, 2021 - Comments: 3

Cache coherency, a common technique for improving performance in chips, is becoming less useful as general-purpose processors are supplemented with, and sometimes supplanted by, highly specialized accelerators and other processing elements. While cache coherency won't disappear anytime soon, it is increasingly being viewed as a luxury necessary to preserve a long-standing programming paradig... » read more

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Knowledge Centers
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by Ann Mutschler

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Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

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Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: CPUs

What Future Processors Will Look Like

New End Markets, More Demand For Complex Chips

Choosing Which Tasks To Optimize In Chips

Using GPUs In Semiconductor Manufacturing

Increasing Performance With Data Acceleration

Chiplets Enter The Supercomputer Race

Assuring Reliable Processor Performance At Scale

Data Center Architectures In Flux

Photomask Challenges At 3nm And Beyond

The High But Often Unnecessary Cost Of Coherence

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Entities, people and technologies explored