tag: CVD

A Look At Atomic Layer Deposition
By Lam Research - 18 May, 2017 - Comments: 0

Imagine being able to deposit a film of material just a few atomic layers at a time. As impossible as that sounds, atomic layer deposition (ALD) is a reality. In fact, it’s being used in an ever-increasing number of applications as an extremely precise and controllable process for creating thin films. Together with its etch counterpart – atomic layer etching (ALE) – ALD is enabling the us... » read more

Intel Inside The Package
By Ed Sperling - 08 May, 2017 - Comments: 1

Mark Bohr, senior fellow and director of process architecture and integration at Intel, sat down with Semiconductor Engineering to discuss the growing importance of multi-chip integration in a package, the growing emphasis on heterogeneity, and what to expect at 7nm and 5nm. What follows are excerpts of that interview. SE: There’s a move toward more heterogeneity in designs. Intel clearly ... » read more

Battling Fab Cycle Times
By Mark LaPedus - 16 Feb, 2017 - Comments: 8

The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node. Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and... » read more

BEOL Issues At 10nm And 7nm
By Ed Sperling - 31 Jan, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

More Reactive, Less Warming
By Katherine Derbyshire - 29 Dec, 2016 - Comments: 0

As mentioned in Part 4 of Semiconductor Engineering's series on fab sustainability, molecular fluorine is one alternative to PFCs or NF3 for CVD chamber cleaning in the integrated circuit and flat panel display industries. It has a number of advantages relative to NF3: an unstable, highly reactive molecule, F2 breaks down easily and has no global warming potential.  When NF3 is used, atomic... » read more

More Than Just Carbon Dioxide
By Katherine Derbyshire - 14 Dec, 2016 - Comments: 0

As discussed in Part Two of this series, lifecycle analyses of greenhouse gas emissions consider both direct and indirect sources. Indirect CO2 emissions, attributed to electricity and other forms of energy purchased by the fab, are the semiconductor industry’s single largest environmental impact. Of those emissions, a large fraction are attributable to plasma-based etch and deposition steps,... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 12 Aug, 2016 - Comments: 0

Chipmakers At this week’s Flash Memory Summit, Samsung rolled out several new products, including its next-generation 3D NAND device and a solid-state drive (SSD) with capacities up to 32 terabytes. At the same time, Samsung introduced a new and high-performance SSD solution, dubbed the Z-SSD. Samsung’s Z-SSD shares the fundamental structure of V-NAND and has a unique circuit design and... » read more

Interconnect Challenges Rising
By Mark LaPedus - 27 Jun, 2016 - Comments: 1

Chipmakers are ramping up their 14nm finFET processes, with 10nm and 7nm slated to ship possibly later this year or next. At 10nm and beyond, IC vendors are determined to scale the two main parts of the [getkc id="185" kc_name="finFET"] structure—the transistor and interconnects. Generally, transistor scaling will remain challenging at advanced nodes. And on top of that, the interconnects ... » read more

Next Challenge: Contact Resistance
By Mark LaPedus - 23 Jun, 2016 - Comments: 0

In chip scaling, there is no shortage of challenges. Scaling the finFET transistor and the interconnects are the biggest challenges for current and future devices. But now, there is another part of the device that’s becoming an issue—the contact. Typically, the contact doesn’t get that much attention, but the industry is beginning to worry about the resistance in the contacts, or conta... » read more

The Trouble With MEMS
By Ed Sperling - 25 May, 2016 - Comments: 0

The advent of the Internet of Things will open up a slew of new opportunities for MEMS-based sensors, but chipmakers are proceeding cautiously. There are a number of reasons for that restraint. Microelectromechanical systems are difficult to design, manufacture and test, which initially fueled optimism in the MEMS ecosystem that this market would command the same kinds of premiums that analo... » read more

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