Digital TV: The Need For Speed


With CES just finishing up, I wanted to take a closer look at the changes in the digital TV market, and what affect those changes have on high performance memory and serial links. Just five years ago, the United States made the transition from analog to digital television. At the time, standard definition digital TV was common, with screens that contained 345 thousand pixels per frame. Recen... » read more

Hybrid Memory Cube – Ready For Prime Time


With the release this week of Hybrid Memory Cube (HMC) 2.0, designers can get their hands on mature, standards-based IP that can be used to significantly scale the performance of servers and data centers. HMC offers bandwidths up to 320 GB/s – 12X that of standard memory solutions like DDR4 – while consuming significantly less power. These benefits are too significant to ignore for ASIC, So... » read more

Memory Directions Uncertain


Semiconductor Engineering sat down with a panel of experts to find out what is happening in world of memories. Taking part in the discussion are [getperson id="11073" comment="Charlie Cheng"], chief executive officer at [getentity id="22135" e_name="Kilopass Technology"]; Navraj Nandra, senior director of marketing for Analog/Mixed signal IP, embedded memories and logic libraries at [getentity ... » read more

The Week In Review: Design


Legal Mentor Graphics won a $36 million award plus royalties stemming from a patent infringement case involving EVE (Emulation & Verification Engineering), an emulation company that was purchased by Synopsys in 2012. A U.S. District Court jury in the District of Oregon found that EVE had directly and indirectly infringed on a 2001 patent entitled "Method and apparatus for gate-level simula... » read more

Will There Be A DDR5?


DDR4 rollouts have begun. And in the DRAM world that begs the question, 'What comes next?' The answer isn't so obvious. While there have been suggestions inside of JEDEC — the Joint Electron Device Engineering Council, which has overseen the standards for double-data-rate synchronous DRAM — to develop a DDR5 standard, it's not the only solution being considered. And in the minds of some... » read more

Driving Memory Beyond DDR4


While attending recent technology trade shows, the Intel Developer’s Forum (IDF) in August and last week’s ARM TechCon, I participated in many interesting discussions around server performance, power consumption, memory bandwidth and capacity. The race to introduce higher-performing servers that consume less power is fueled by the growing demand for new applications in the enterprise, commu... » read more

Memory Directions Uncertain


Semiconductor Engineering sat down with a panel of experts to find out what is happening in world of memories. Taking part in the discussion are [getperson id="11073" comment="Charlie Cheng"], chief executive officer at [getentity id="22135" e_name="Kilopass Technology"]; Navraj Nandra, senior director of marketing for Analog/Mixed signal IP, embedded memories and logic libraries at [getentity ... » read more

Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

Improving Yield Of 2.5D Designs


While progress is being made on the packaging side of 2.5D design, more needs to be resolved when it comes to improving yields. Proponents of 2.5D present compelling benefits. Arif Rahman, a product architect at Altera, noted that the industry trend of silicon convergence is leading to multiple technologies being integrated into single-chip solutions. “2.5D/3D integration has multiple adva... » read more

Blog Review: March 26


Synopsys’ Eric Huang has discovered a video of Superman using a GoPro camera (scroll down to bottom of page). So this is what it’s like to stop bullets with your hand. Cadence’s Tom Hackett zeroes in on mobile interfaces in a video—SoC fabric, memory and chip-to-chip. Nice whiteboard drawing. Mentor’s Anil Khanna looks at a methodology for developing high-performance embedded so... » read more

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