Process Window Optimization Of DRAM By Virtual Fabrication

By Daebin Yim - 21 Dec, 2020 - Comments: 0

New integration and patterning schemes used in 3D memory and logic devices have created manufacturing and yield challenges. Industrial focus has shifted from the scaling of predictable unit processes in 2D structures to the more challenging full integration of complex 3D structures. Conventional 2D layout DRC, offline wafer metrology, and offline electrical measurements are no longer sufficient... » read more

Revealing DRAM Operating GuardBands through Workload-Aware Error Predictive Modeling

By Technical Paper Link - 15 Dec, 2020 - Comments: 0

Abstract Abstract—Improving the energy efficiency of DRAMs becomes very challenging due to the growing demand for storage capacity and failures induced by the manufacturing process. To protect against failures, vendors adopt conservative margins in the refresh period and supply voltage. Previously, it was shown that these margins are too pessimistic and will become impractical due to high ... » read more

EUV Challenges And Unknowns At 3nm and Below

By Mark LaPedus - 19 Nov, 2020 - Comments: 1

The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

A Study Of Wiggling AA Modeling And Its Impact On Device Performance In Advanced DRAM

By Coventor - 18 Nov, 2020 - Comments: 0

In this paper, a wiggling active area (fin) in an advanced 1x DRAM process was analyzed and modeled using the pattern-dependent etch simulation capabilities of the SEMulator3D semiconductor modeling software. Nonuniformity in sidewall passivation caused by hard mask pattern density loading was identified as the root cause of the wiggling profile. The calibrated model mimicked these phenomena, g... » read more

Difficult Memory Choices In AI Systems

By Ann Mutschler - 12 Nov, 2020 - Comments: 0

The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

Micro Loading And Its Impact On Device Performance

By Qingpeng Wang - 02 Nov, 2020 - Comments: 0

In a DRAM structure, the charging and discharging process of capacitor-based memory cells is directly controlled by the transistor [1]. With transistor sizes approaching the lower limits of physical achievability, manufacturing variability and micro loading effects are becoming increasingly critical DRAM performance (and yield) limiters. The transistor’s AA (active area) dimension and profile... » read more

A Renaissance For Semiconductors

By Brian Bailey - 29 Oct, 2020 - Comments: 2

Major shifts in semiconductors and end markets are driving what some are calling a renaissance in technology, but navigating this new, multi-faceted set of requirements may cause some structural changes for the chip industry as it becomes more difficult for a single company to do everything. For the past decade, the mobile phone industry has been the dominant driver for the semiconductor eco... » read more

What’s Ahead For Chips & Equipment?

By Mark LaPedus - 22 Oct, 2020 - Comments: 0

It’s been a topsy-turvy year in the semiconductor industry. 2020 was supposed to be a strong year. Then, the coronavirus outbreak hit. Countries implemented various measures to mitigate the outbreak, such as stay-at-home orders and store closures. Economic turmoil and job losses soon followed. Earlier in the year, the chip market looked bleak. Now, business appears to be strong. To gain... » read more

Deals That Change The Chip Industry

By Ed Sperling - 28 Sep, 2020 - Comments: 0

Nvidia's pending $40 billion acquisition of Arm is expected to have a big impact on the chip world, but it will take years before the effects of this deal are fully understood. More such deals are expected over the next couple of years due to several factors — there is a fresh supply of startups with innovative technology, interest rates are low, and market caps and stock prices of buyers ... » read more

DRAM, 3D NAND Face New Challenges

By Mark LaPedus - 21 Sep, 2020 - Comments: 1

It’s been a topsy-turvy period for the memory market, and it's not over. So far in 2020, demand has been slightly better than expected for the two main memory types — 3D NAND and DRAM. But now there is some uncertainty in the market amid a slowdown, inventory issues and an ongoing trade war. In addition, the 3D NAND market is moving toward a new technology generation, but some are enc... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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