Developing A Real-Time SDR System

By Mariusz Grabowski - 29 Jul, 2021 - Comments: 0

As telecommunication technologies evolve there is an on-going drive for the development of high-performance systems for radio communications. Part of that evolution involves implementing components in software functions that had traditionally been implemented in hardware. Software-defined radio (SDR) is a prime example. Significant amounts of signal processing have been handed over to the ge... » read more

Modernizing Audio Codec Industry Standards For Enhanced Power Savings And Performance

By Raj Pawate - 13 May, 2021 - Comments: 0

Mobile phones have become a necessity, and we all use them to talk, play, communicate, and manage many aspects of our lives. While you may have an iPhone, your friends might have an Android phone from one of several vendors. They all look and feel different, yet you can seamlessly talk with your friends. How is that possible? While they are different in some ways, they are similar in many oth... » read more

Firmware Skills Shortage

By Brian Bailey - 25 Feb, 2021 - Comments: 0

Good hardware without good software is a waste of silicon, but with so many new processors and accelerator architectures being created, and so many new skills required, companies are finding it hard to hire enough engineers with low-level software expertise to satisfy the demand. Writing compilers, mappers and optimization software does not have the same level of pizazz as developing new AI ... » read more

Powering The Edge: Driving Optimal Performance With Ethos-N77 Processor

By Arm - 09 Dec, 2020 - Comments: 0

Repurposing a CPU, GPU, or DSP is an easy way to add ML capabilities to an edge device. However, where responsiveness or power efficiency is critical, a dedicated Neural Processing Unit (NPU) may be the best solution. In this paper, we describe how the Arm Ethos-N77 NPU delivers optimal performance. Click here to immediately download the paper. » read more

Have Processor Counts Stalled?

By Brian Bailey - 24 Sep, 2020 - Comments: 2

Survey data suggests that additional microprocessor cores are not being added into SoCs, but you have to dig into the numbers to find out what is really going on. The reasons are complicated. They include everything from software programming models to market shifts and new use cases. So while the survey numbers appear to be flat, market and technology dynamics could have a big impact in resh... » read more

The Increasingly Ordinary Task Of Verifying RISC-V

By Ann Mutschler - 03 Jun, 2020 - Comments: 0

As RISC-V processor development matures and its usage in SoCs and microcontrollers grows, engineering teams are starting to look beyond the challenges of the processor core itself. So far, the majority of industry verification efforts have focused on ISA compliance to standardize the RISC-V core. Now the focus is shifting to be how to handle verification as the system grows, especially as this... » read more

High-Speed SerDes At 7/5nm

By Ed Sperling - 02 Jun, 2020 - Comments: 0

Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how to optimize PHYs for integration on all four corners of an SoC, as well as the PPA implications of moving large amounts of data across and around a chip. » read more

The Murky World Of AI Benchmarks

By Ann Mutschler - 30 Apr, 2020 - Comments: 0

AI startup companies have been emerging at breakneck speed for the past few years, all the while touting TOPS benchmark data. But what does it really mean and does a TOPS number apply across every application? Answer: It depends on a variety of factors. Historically, every class of design has used some kind of standard benchmark for both product development and positioning. For example, SPEC... » read more

Tracking Automotive’s Rapidly Shifting Ecosystem

By Ann Mutschler - 02 Apr, 2020 - Comments: 0

The automotive ecosystem is becoming much harder to navigate as automakers, Tier 1s and IP vendors redefine their relationships based upon shifting value caused by an rapidly expanding amount of increasingly interdependent and complex electronic content. Predictions of massive change started almost a decade ago with a number of pilot programs around autonomous vehicles. But those shifts real... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 13 Mar, 2020 - Comments: 0

AI, machine learning Cadence says it has optimized its Tensilica HiFi digital signal processor IP to efficiently execute TensorFlow Lite for Microcontrollers, which are used in Google’s machine learning platform for edge. This means developers of AI/ML on the edge systems can now put better audio processing on edge devices with ML applications like keyword detection, audio scene detection, n... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?