Week In Review: Manufacturing, Test


Chipmakers and OEMs Senator Patrick Leahy (D-Vt.), Senator Chuck Schumer (D-N.Y.) and Senator Jack Reed (D-R.I.) have sent a letter to officials from the Trump administration, demanding answers about TSMC’s recent announcement to build a fab in Ariz. As reported, TSMC has announced its intention to build and operate an advanced semiconductor fab in the U.S. The fab, to be built in Arizona, w... » read more

Improving Circuit Reliability


Carey Robertson, product marketing director at Mentor, a Siemens Business, examines reliability at advanced and mainstream nodes, particularly in automotive and industrial applications, what’s driving growing concern about the reliability and fidelity of analog circuits, and the impact of running circuits for longer periods of time under different voltage and environmental conditions. » read more

A Reliable I/O Ring For A Reliable SoC


What is an input/output (I/O) ring, and why should I care about it? If you’re a system-on-chip (SoC) designer, you had better know the answer to that question. SoCs are the darlings of the semiconductor industry—they combine all the typical functionality of a computer (central processing unit (CPU), memory, input/output (I/O) ports, and storage) on a single chip. They’re particularly popu... » read more

Wrestling With High-Speed SerDes


SerDes has emerged as the primary solution in chips where there is a need for fast data movement and limited I/O, but this technology is becoming significantly more challenging to work with as speeds continue to rise to offset the massive increase in data. A Serializer/Deserializer is used to convert parallel data into serial data, allowing designers to speed up data communication without h... » read more

Speed Up P2P Resistance Debugging With Selective Highlighting


Point-to-point (P2P) resistance simulation calculates the effective parasitic resistance from one or more specified points (sources) to another set of points (sinks) on an integrated circuit (IC) layout. The results of these simulations are a key component in the verification of the robustness and reliability of IC layout interconnect—designers must have this information to accurately perform... » read more

Week In Review: Manufacturing, Test


Trade wars The trade war between the United States and China is escalating and it is here to stay. Victor Davis Hanson, a senior fellow at think tank Hoover Institution, said the United States is at a crossroads with China. It could define America’s security and the international order for decades to come. Here’s the latest blog on trade tensions between the U.S. and China. “Tensions ... » read more

The Long And Detailed Road To Automotive Compliance


Compliance with automotive safety requirements is slowing down both innovation and participation by a flurry of startups as the whole ecosystem struggles to bring autonomous vehicles to reality. This is particularly onerous for chipmakers, which face a high bar for IC integrity and reliability. They must meet specifications and be free of design errors. Improper behavior in corner-case s... » read more

A Comprehensive Approach To System-Level ESD


The performance and reliability of an electronics system largely depend on the system’s immunity from an electrostatic discharge (ESD) event. Because the components, custom chips and package come from various sources — and often from different companies — they are usually designed by separate teams working in silos and in accordance with predefined margins. The ESD Association estimates t... » read more

Process Variation And Aging


Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; and Naseer Khan, vice president of sales at M... » read more

Aging In Advanced Nodes


Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

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