Experts At The Table: Who Takes Responsibility?


By Ed Sperling Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate market... » read more

Stacking The Deck


By Javier DeLaCruz The pinnacle of system-on-chip has passed. There are several dynamics that are moving the industry away from the SoC philosophy that was so popular just a few short years ago. One of the significant factors is that the cost per gate for CMOS nodes below 28nm is rising for the first time in the history of our industry. Another critical factor is the emergence of through-silic... » read more

Buying And Selling EDA Companies


By Ed Sperling The rule of thumb for mergers and acquisitions is that the majority will fail. So why, despite concerns about big companies buying up the tools of startups, does EDA’s track record look so good? There are a number of answers that are unique to the EDA industry: There is no manufacturing that needs to be absorbed by the acquirer, which greatly simplifies any deal. Sale... » read more

Aging: Not Always A Bad Thing


By Ann Steffora Mutschler When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. Determining how a device will operate over time is a key aspect of overall reliability and is commonly referred to as ‘aging.’ Aging of electronics is not a new problem. In fact, analog and automotive designers have bee... » read more

Stacking The Deck


By Javier DeLaCruz The pinnacle of system-on-chip has passed. There are several dynamics that are moving the industry away from the SoC philosophy that was so popular just a few short years ago. One of the significant factors is that the cost per gate for CMOS nodes below 28nm is rising for the first time in the history of our industry. Another critical factor is the emergence of through-silic... » read more

The New ASIC


By Javier DeLaCruz The current state of the art For years, large ASICs like the ones used in network processing, supercomputing and high-end personal computing have had very interesting similarities. The figure below is a fairly typical floorplan of such an ASIC. After taping out over a dozen of these types of chips a year, it is interesting to see that the interfaces have changed, processo... » read more

3D IC Supply Chain: Still Under Construction


By Barbara Jorgensen and Ed Sperling Stacked die, which promise high levels of integration, a tiny footprint, energy conservation and blinding speed, still have some big hurdles to overcome. Cost, packaging and manufacturability continue to make steady progress, with test chips being produced by all of the major foundries. But in a disaggregated ecosystem, the supply chain remains a big st... » read more

New Silos Form In IC Industry


By Ed Sperling For the past couple of decades corporations around the globe have been focused on down silos. In fact, it has become a mantra. It’s considered essential for making established corporations even more successful, and it’s almost always at the center of turnaround plans for troubled companies. Moreover, across a full spectrum of companies, it’s regularly cited by management c... » read more

Strategies To Prevent IC Failures In Volume Production


When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. This paper outlines strategies and practices used to statistically sample, and predict how a device will operate over time. The practices outlined are believed to be best in class techniques for a successful product launch. These strategies most likely ... » read more

Strategies To Prevent IC Failures In Volume Production


When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. This paper outlines strategies and practices used to statistically sample, and predict how a device will operate over time. The practices outlined are believed to be best in class techniques for a successful product launch. These strategies most likely ... » read more

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