Multicore Madness


By Mark LaPedus Smartphones and tablets are migrating towards new and faster application processors, basebands, graphics chips and memories. In the cell-phone chipset area alone, there are a multitude of options and design considerations. Some devices combine the application processor and modem on the same chip. Some are separate devices. In addition, the architectures range from single- to... » read more

Accelerating Moore’s Law


By Ed Sperling Ever since the inception of Moore’s Law, process nodes have moved forward at a rate of once every 18 to 24 months. Companies have been talking about slowing down the rate of progression as things get harder, but at least for the next couple of process nodes something very strange will occur—Moore’s Law will accelerate. The root cause is growing competition for a shrinki... » read more

FinFETs, EUV And Moore’s Law


GlobalFoundries VP Subramani Kengeri talks about progress and problems with advanced processes with Semiconductor Manufacturing & Design. [youtube vid=_Ang0I1vWdI] » read more

Making The Right Choices


FD-SOI at 28nm, or finFETs at 20/14nm? To companies looking at the cost equation, the total market opportunity for SoCs and the NRE required to get there, this is still a manageable formula. It requires lots of number crunching and some unknowns, but by the time you get done with the math it still falls within an acceptable margin of error and the choices are relatively simple. For foundries... » read more

Too Hot To Handle


By Ann Steffora Mutschler It used to be that a device could be designed to a thermal design power. The worst case power scenario would be imagined, and the device would be designed with that in mind. But those good old days are gone. Especially for consumer devices, how a device is going to behave with respect to time, or how people are going to use it, must be understood as completely a... » read more

Sprint To The Finish Line


By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss future challenges, pain points, and how the supply chain is being reconfigured with Chi-Ping Hsu, senior vice president for R&D in the Silicon Realization Group at Cadence. What follows are excerpts of that conversation. LPHP: Has the move to 20nm processes with 14nm finFETs progressed as smoothly as everyone hop... » read more

28nm Powers TSMC Forward


By Barry Pangrle TSMC’s financial results for Q4 of 2012 and for the full year were announced just a few weeks agom with TSMC stating it had achieved record sales and profits. Basically, TSMC currently owns the 28nm foundry market. Chairman Morris Chang was clear to distinguish 28nm from 32nm. TSMC substantially moved to the 40nm “half-node” from 45nm, and then skipped 32nm and went to 2... » read more

Tech Talk: Getting To The Next Node


IBM's Gary Patton talks with Low-Power/High-Performance Engineering about finFETs, EUV, and the challenges of staying on the Moore's Law road map. [youtube vid=jtz9XSXyBp0] » read more

Math Questions


The race is on. GlobalFoundries, TSMC, Samsung, IBM and Intel are all neck deep in research, test chips, variability, lithography and three-dimensional transistor designs. For the first time, though, the goal very publicly has shifted from performance and area to energy efficiency. Being able to double battery life with existing performance over the next couple nodes could mean smart phones ... » read more

Cost Per Transistor Gets Fuzzier


By Ed Sperling Cost per transistor always has been a major reason for chipmakers to migrate to the next process node. By shrinking transistors and adding more logic, performance usually gets a boost. Moreover, that usually provides enough engineering wiggle room to add some improvements in energy efficiency. The basic assumption that you can double the number of transistors every 24 months,... » read more

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