tag: finFETs

28nm Powers TSMC Forward
By Barry Pangrle - 14 Feb, 2013 - Comments: 1

By Barry Pangrle TSMC’s financial results for Q4 of 2012 and for the full year were announced just a few weeks agom with TSMC stating it had achieved record sales and profits. Basically, TSMC currently owns the 28nm foundry market. Chairman Morris Chang was clear to distinguish 28nm from 32nm. TSMC substantially moved to the 40nm “half-node” from 45nm, and then skipped 32nm and went to 2... » read more

Tech Talk: Getting To The Next Node
By Ed Sperling - 14 Feb, 2013 - Comments: 0

IBM's Gary Patton talks with Low-Power/High-Performance Engineering about finFETs, EUV, and the challenges of staying on the Moore's Law road map. [youtube vid=jtz9XSXyBp0] » read more

Math Questions
By Ed Sperling - 08 Feb, 2013 - Comments: 0

The race is on. GlobalFoundries, TSMC, Samsung, IBM and Intel are all neck deep in research, test chips, variability, lithography and three-dimensional transistor designs. For the first time, though, the goal very publicly has shifted from performance and area to energy efficiency. Being able to double battery life with existing performance over the next couple nodes could mean smart phones ... » read more

Cost Per Transistor Gets Fuzzier
By Ed Sperling - 31 Jan, 2013 - Comments: 0

By Ed Sperling Cost per transistor always has been a major reason for chipmakers to migrate to the next process node. By shrinking transistors and adding more logic, performance usually gets a boost. Moreover, that usually provides enough engineering wiggle room to add some improvements in energy efficiency. The basic assumption that you can double the number of transistors every 24 months,... » read more

Tradeoffs On The Fly
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ann Steffora Mutschler With classical bulk planar technology no longer shrinkable, the industry has been honing in on new ways to continue some scaling, achieve extra speed or better power while minimizing leakage. “To overcome the limits [of bulk planar technology] we need a different solution,” explained Giorgio Cesano, technology R&D marketing director at STMicroelectron... » read more

It’s Transition Time Again
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling After decades of shrinking features, developing new software on every level and engineering huge improvements in energy efficiency and performance, the semiconductor industry has reached a crossroads. To get to the next level will require massive improvements on all fronts, but not all consumers will be willing to pay for them. For example, if a battery lasts an entire day f... » read more

First Silicon At 14nm
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ed Sperling The first 14nm test chips are beginning to roll out the door from foundries, and companies are beginning to trumpet their success. But before anyone pops the champagne corks, there are some caveats. First of all, what most people are billing as 14nm chips are actually mostly 20nm. They are readily willing to concede that point, settling on 16nm, but the reality is that it’s... » read more

All Things To All Customers
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ann Steffora Mutschler Low-Power High-Performance Engineering recently spoke with Suresh Menon, VP of systems development at Lattice Semiconductor, about the challenges of directing the development of power-sensitive FPGAs from architectural decisions to identifying the target applications. What follows are excerpts of that discussion. LPHP: When you look at the products that Lattic... » read more

Designing With FinFETs: The Opportunities And The Challenges
By Various Writers - 29 Dec, 2012 - Comments: 0

With the help of double-patterning and other advanced lithography techniques, CMOS technology continues to scale to 20-nanometer (nm) and beyond. Yet, because of their superior attributes, FinFETs are replacing planar CMOS technology as the device technology of choice at these advanced nodes. In particular, FinFETs demonstrate better results in the areas of performance, leakage and dynamic powe... » read more

Predictions, Problems And Prognosis
By Ed Sperling - 19 Dec, 2012 - Comments: 0

Never before in the long and often turbulent history of the semiconductor industry have so many problems presented themselves at each new process node. And never before have there been so many well-tested choices to resolving them. After possibly the most intensive, extensive and expensive research this industry has ever witnessed, Moore’s Law is now technologically assured down to at leas... » read more

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