Supply Chain Collaboration Key To Making Chip Industry More Sustainable

By Cassandra Melvin - 19 Jan, 2023 - Comments: 0

Coming in the wake of the COP27, the Smart and Green Manufacturing Summit at SEMICON Europa 2022 (Munich, 15-17 November) had a timely focus on the semiconductor industry’s contribution to meeting the United Nations’ target of limiting global warming to 1.5°C above pre-industrial levels. However, in an industry as large and valuable as semiconductors, social as well as environmental imp... » read more

High-NA EUV May Be Closer Than It Appears

By Katherine Derbyshire - 16 Jun, 2022 - Comments: 1

High-NA EUV is on track to enable scaling down to the Angstrom level, setting the stage for chips with even higher transistor counts and a whole new wave of tools, materials, and system architectures. At the recent SPIE Advanced Lithography conference, Mark Phillips, director of lithography hardware and solutions at Intel, reiterated the company’s intention to deploy the technology in high... » read more

A New Dawn For IP

By Brian Bailey - 12 Dec, 2019 - Comments: 0

The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

System Bits: Jan. 16

By Ann Mutschler - 16 Jan, 2018 - Comments: 0

Nitrogen-atom-sized sensors A new quantum sensor developed by Fraunhofer researchers will be able to measure the tiny magnetic fields of the next generation of hard discs, leveraging the new opportunities that quantum technology promises. [caption id="attachment_430671" align="aligncenter" width="300"] The special ellipsoid form of the plasma reactor developed at Fraunhofer IAF allows for l... » read more

The Week in Review: IoT

By Jeff Dorsch - 22 Nov, 2017 - Comments: 0

Commentary Chris Voce of Forrester Research writes that the Internet of Things next year will move beyond experimentation in this piece. “At Forrester we believe IoT extends beyond devices and connectivity,” he writes. “But it's the business impact of IoT that truly defines what it is: the insights that you can derive with analytics and the business outcomes you can achieve.” M&A M... » read more

MEMS: A Tale Of Two Tough Markets

By Ed Sperling - 22 Feb, 2017 - Comments: 0

The MEMS market is growing rapidly, profits not so much. In most market segments, this would be a signal that more automation and standardization are required. But in the microelectromechanical systems world, fixes aren't so simple. And even where something can be automated, that automation doesn't work all the time. In fact, while MEMS devices are extremely difficult to design, build and ma... » read more

Manufacturing Bits: June 28

By Mark LaPedus - 28 Jun, 2016 - Comments: 1

Redefining the kilogram The National Institute of Standards and Technology (NIST) has developed a new scale that could one day enable a new and improved definition of the kilogram. The scale is called the NIST-4 watt balance. It has conducted its first measurement of a physical quantity called Planck’s constant to within 34 parts per billion. The scale is not intended to alter the va... » read more

How To Build Systems In Package

By Ed Sperling - 15 Jun, 2016 - Comments: 0

The semiconductor industry is racing to define a series of road maps for semiconductors to succeed the one created by the ITRS, which will no longer be updated, including a brand new one focused on heterogeneous integration. The latest entry will establish technology targets for integration of heterogeneous multi-die devices and systems. It has the support of IEEE's Components, Packaging and... » read more

SEMICON West Preview

By SEMI - 19 May, 2014 - Comments: 0

By Paula Doe The fast growing demand for bandwidth is driving telecomm and data center user interest in moving high speed optical connections closer and closer to the chips, as recent advances in packaging technology, from microbumping to bonding to wafer-level redistribution now help make it possible. Chip-to-chip and chip-to-board optical connections increasingly look like a viable soluti... » read more

Challenges In 3D Resists

By Katherine Derbyshire - 24 Mar, 2014 - Comments: 2

3D integration straddles the line between CMOS fabs and packaging and assembly houses. Depending on the structure being fabricated, the most appropriate process might be more “CMOS-like” or more “package-like.” For example, in CMOS fabs lithography means spin-on photoresist, exposed by a high precision stepper. Inherent in this approach is an assumption that the wafer surface is flat... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?