How Low Can You Go? Pushing The Limits Of Transistors


Deep low voltage enablement of embedded memories and logic libraries to achieve extreme low power: Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when... » read more

Is RISC-V Ready For Supercomputing?


RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

How To Raise Reliability, Availability, And Serviceability Levels For HPC SoCs


By Charlie Matar, Rita Horner, and Pawini Mahajan While once the domain of large data centers and supercomputers, high-performance computing (HPC) has become rather ubiquitous and, in some cases, essential in our everyday lives. Because of this, reliability, availability, and serviceability, or RAS, is a concept that more HPC SoC designers should familiarize themselves with. RAS may sound... » read more

Hunting For Hardware-Related Errors In Data Centers


The semiconductor industry is urgently pursuing design, monitoring, and testing strategies to help identify and eliminate hardware defects that can cause catastrophic errors. Corrupt execution errors, also known as silent data errors, cannot be fully isolated at test — even with system-level testing — because they occur only under specific conditions. To sort out the environmental condit... » read more

Benefits Of A Silicon-Proven 800G Ethernet Solution For High-Performance Computing


The evolution of high-speed Ethernet began in 2014 when Arista, Broadcom, Microsoft, Mellanox and Google formed the Ethernet Consortium, now called the “Ethernet Technology Consortium.” Since then, the technology has been adopted by more than 45 members. The push for 200G, then 400G, and now 800G Ethernet is driven by the insatiable need to process and transmit high-performance workloads in... » read more

RISC-V decoupled Vector Processing Unit (VPU) For HPC


A technical paper titled "Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications" was published by researchers at Barcelona Supercomputing Center, Spain. "The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of ... » read more

The Data Center Journey, From Central Utility To Center Of The Universe


High-performance computing (HPC) has taken on many meanings over the years. The primary goal of HPC is to provide the needed computational power to run a data center – a utilitarian facility dedicated to storing, processing, and distributing data. The beginning of HPC Historically, the data being processed was the output of business operations for a given organization. Transactions, custome... » read more

A New Era For HPC-Driven Engineering Simulation


Market pressure and technological advancements have rapidly changed the way engineers work. Design engineers increasingly work with larger and more complex models, must conduct more frequent simulation analysis, and iterate more rapidly. Compute constraints, however, often result in engineers limiting model sizes and simulation fidelity, or relying on lengthy, overnight simulation runs. ... » read more

The Value Of High-Performance Computing For Simulation


This white paper breaks down the costs and time savings associated with implementing high-performance computing technology. High-performance computing (HPC) is an enormous part of the present and future of engineering simulation. HPC allows best-in-class companies to gain high-fidelity insight into product behavior, insight that cannot be obtained without the detailed simulation models – i... » read more

SW/HW Framework for for GASNet-enabled FPGA Hardware Acceleration Infrastructure


Researchers from KAIST and Flapmax published a new technical paper titled "FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure." Abstract "By providing highly efficient one-sided communication with globally shared memory space, Partitioned Global Address Space (PGAS) has become one of the most promising parallel computing model... » read more

← Older posts Newer posts →