The Week in Review: IoT


Finance San Francisco-based Aquabyte has raised $3.5 million in seed funding led by Costanoa Ventures and New Enterprise Associates. Princeton University and strategic investors in the U.S. and Norway also participated in the round. The startup is using computer vision and machine learning to optimize efficiency in fish farming. Aquabyte is first deploying its technology in Norway in cooperati... » read more

Manufacturing Bits: Jan. 30


SRC’s new R&D centers The Semiconductor Research Corp. has launched a network of research centers within its recently-announced Joint University Microelectronics Program (JUMP). SRC officially launched the 5-year, $200 million program on Jan. 1. With various research centers, the mission of JUMP is to lay the groundwork that extends the viability of Moore’s Law through 2040. The idea is... » read more

The Week In Review: Design


Security Addressing the Meltdown and Spectre speculative execution vulnerabilities has not gone smoothly. Intel's firmware update caused unexpected behavior and a higher than expected number of reboots for its Haswell and Broadwell chips, leading the company to recommend users stop patching until an updated version of the patch is available. Microsoft's attempts to fix the issue left some W... » read more

The Advantages Of FD-SOI Technology


If my memory serves me well, it was at the 1989 Device Research Conference where the potential merits of SOI (Silicon on Insulator) technology were discussed in a heated evening panel discussion. At that panel discussion, there were many advocates for SOI, as well as many naysayers. I didn’t really think more about SOI technology until the mid-nineties, when I was sitting in a meeting where t... » read more

Turning Down The Power


Chip and system designers are giving greater weight to power issues these days. But will they inevitably hit a wall in accounting for ultra-low-power considerations? Performance, power, and area are the traditional attributes in chip design. Area was originally the main priority, with feature sizes constantly shrinking according to Moore's Law. Performance was in the saddle for many years. M... » read more

The Future Of AI Is In Materials


I had the pleasure of hosting an eye-opening presentation and Q&A with Dr. Jeff Welser of IBM at a recent Applied Materials technical event in San Francisco. Dr. Welser is Vice President and Director of IBM Research's Almaden lab in San Jose. He made the case that the future of hardware is AI. At Applied Materials we believe that advanced materials engineering holds the keys to unlocking... » read more

Getting Serious About Chiplets


Demand for increasingly complex computation, more features, lower power, and shorter lifecycles are prompting chipmakers to examine how standardized hard IP can be used to quickly assemble systems for specific applications. The idea of using chiplets, with or without a package, has been circulating for at least a half-dozen years, and they can trace their origin back to IBM's packaging schem... » read more

The Week in Review: IoT


Products/Services No matter the size of your button! You can now order up a flight on a private jet with the push of, yes, a button! GrandView Jets, an affiliate of GrandView Aviation, is bringing out a Web-enabled “Press for Jet” button, an Amazon Web Services Internet of Things button enabled by ButtonJoy Software. GrandView Jets says it has a fleet of Embraer Phenom 300 private jets to ... » read more

Blockchain: Hype, Reality, Opportunities


Blockchain buzz has reached deafening levels, and its proponents say we haven’t heard anything yet. The blockchain-enabled transformations they describe make the Internet revolution look almost trivial. Critics argue that too many people drank the blockchain Kool-Aid. Outside the cryptocurrency arena, they say that blockchain amounts to little more than some really slick slideware. The ... » read more

Blog Review: Jan. 3


Ansys' Steve Pytel argues that increased signaling speeds and frequencies have led to signal integrity issues that circuit simulation alone cannot handle. Cadence's Paul McLellan dives into the details of Intel's 10nm process, including three layers of self-aligned quadruple patterning, contact-over-active-gate, and cobalt for contact fill. Mentor's Ron Press and Vidya Neerkundar argue th... » read more

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