tag: imec

Litho Challenges Break The Design-Process Wall
By Katherine Derbyshire - 22 Jun, 2015 - Comments: 3

The days when chip designers could throw tape “over the wall” to the manufacturing side are long gone. Over the last several technology generations, increasingly restrictive process kits have forced designers to accommodate their circuit structures to the manufacturing process. Lacking a successor to 193nm lithography, the industry has turned to increasingly complex resolution enhancemen... » read more

Manufacturing Bits: June 16
By Mark LaPedus - 16 Jun, 2015 - Comments: 0

Harmonic EUV The U.S. Department of Energy’s Lawrence Berkeley National Laboratory has devised an efficient extreme ultraviolet (EUV) source. The technology could one day be used for a new class of metrology tools, based on angle-resolved photoemission spectroscopy (ARPES). This technique makes use of a photoelectric effect for studying materials. To enable the source, Berkeley Labs devel... » read more

Semiconductor R&D Crisis?
By Mark LaPedus - 11 Jun, 2015 - Comments: 3

Research and development is a sometimes forgotten but critical element in the semiconductor industry. The delicate R&D ecosystem enables many of the key breakthroughs in the business. But there could be a troubling trend, if not a crisis, brewing on two fronts in the R&D arena. On one front, R&D costs for semiconductor technologies are escalating at each node. Higher R&D costs are not only ... » read more

Can Copper Revolutionize Interconnects Again?
By Katherine Derbyshire - 10 Jun, 2015 - Comments: 2

Electromigration and resistivity present serious obstacles to interconnect scaling, as previously discussed. In a copper damascene process, grain growth is constrained by the narrow trenches into which copper is deposited. As the grain size approaches the mean free path of electrons in copper, electron scattering at sidewalls and grain boundaries increases and resistivity jumps. Meanwhile, incr... » read more

DAC 2015 Day 2: Keynotes, Tutorials and More
By Brian Bailey - 09 Jun, 2015 - Comments: 0

Walking to DAC, you had to pass the Apple Developers Conference. The line to get in wrapped all the way around the block and there were many peaceful protests directed towards them. Large TV trucks, trucks from CNN, MSNBC and many others lined the streets to hear about new capabilities coming to the group of people who create the Apps for Apple devices. None of them were probably even aware tha... » read more

New Approaches To Imaging For Both Large And Small
By Michael Watts - 08 Jun, 2015 - Comments: 0

Imaging is the common theme for everything at Photonics West this year, and two new ideas caught my attention—a near field very small microscope and a new way of collecting images that separates reflected light from indirect light. IMEC has presented papers about its near field microscope before. This year the research house has reduced it to a product. The idea is to illuminate a object w... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 22 May, 2015 - Comments: 0

At an event, Samsung rolled out its 10nm finFET technology. The company also showed a 300mm wafer with 10nm finFET transistors. "We have silicon-based PDKs out," said Kelvin Low, senior director of foundry marketing for Samsung. Samsung plans to move into production with its 10nm finFET technology by the end of 2016, he said. IC Insights released its chip rankings in terms of sales in the fi... » read more

Waiting For Next-Gen Metrology
By Mark LaPedus - 21 May, 2015 - Comments: 0

Chipmakers continue to march down the various process nodes, but the industry will require new breakthroughs to extend IC scaling at 10nm and beyond. In fact, the industry will require innovations in at least two main areas—patterning and the [getkc id="36" comment="Interconnect"]. There are other areas of concern, but one technology is quickly rising near the top of the list—metrology.... » read more

The Roadmap To 5nm
By SEMI - 11 May, 2015 - Comments: 0

By Debra Vogler Among the challenges the semiconductor industry will be facing as it moves down the path to node 5 are resistance-capacitance (RC) management and integration. SEMI is pleased to announce a SEMICON West 2015 STS technical program exploring these and other high-volume manufacturing challenges. According to An Steegen, SVP of Process Technology at imec, the list of RC managemen... » read more

The End Of Silicon?
By Katherine Derbyshire - 04 May, 2015 - Comments: 1

As transistors shrink, not all device parameters scale at the same rate—and therein lies a potentially huge problem. In recent years, manufacturers have been able to reduce equivalent oxide thickness (EOT) more quickly than operating voltage. As a result, the electric field present in the channel and gate dielectric has been increasing. Moreover, EOT reduction is achieved in part by reduci... » read more

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