tag: imec

The Search For The Next Transistor
By Mark LaPedus - 20 Feb, 2014 - Comments: 3

In the near term, the leading-edge chip roadmap looks fairly clear. Chips based on today’s finFETs and planar fully depleted silicon-on-insulator (FDSOI) technologies are expected to scale down to the 10nm node. But then, the CMOS roadmap becomes foggy at 7nm and beyond. The industry has been exploring a number of next-generation transistor candidates, but suddenly, a few technologies are ... » read more

Executive Insight: Luc Van den hove
By Mark LaPedus - 20 Feb, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss current and future process technology challenges with Luc Van den hove, president and chief executive of Imec. What follows are excerpts of that conversation. SE: The industry is simultaneously working on several new and expensive technologies. This includes extreme ultraviolet (EUV) lithography and the next-generation 450mm wafer size. The indu... » read more

Interconnect Challenges Grow
By Mark LaPedus - 20 Feb, 2014 - Comments: 0

Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

Why Would IBM Sell Its Semi Group?
By Ed Sperling - 20 Feb, 2014 - Comments: 1

Rumors are always just rumors until proven otherwise in business, but in the case of IBM’s semiconductor business, hints about the sale of its semiconductor business are particularly noteworthy. Much has changed since the days when IBM—as International Business Machines—went head-to-head with AT&T’s quasi-public Bell Labs and Xerox’s Palo Alto Research Center (PARC). The breakup of... » read more

Looking Beyond Moore’s Law
By Mark LaPedus - 20 Feb, 2014 - Comments: 2

For decades, chip scaling has followed a simple linear curve. In this curve, the transistor gate-pitch scales at 0.7x every two years. This is the driving force behind Moore’s Law, which states that the number of transistors per chip roughly doubles every two years. But starting at the 16nm/14nm node, there is a change taking place in chip scaling. According to a chart from Imec, there are... » read more

The List Of Unknowns Grows After Silicon
By Katherine Derbyshire - 07 Feb, 2014 - Comments: 3

As discussed earlier in this series, most proposed alternative channel schemes depend on germanium channels for pMOS transistors, and InGaAs channels for nMOS transistors. Of the two materials, InGaAs poses by far the more difficult integration challenges. Germanium has been present in advanced silicon CMOS fabs for several technology generations, having been introduced used in strained silicon... » read more

IMEC’s 30th Anniversary: A Consortium With Impact
By Michael Watts - 01 Feb, 2014 - Comments: 0

In the history of semiconductor technology, one of the critical non-technology changes was the point when the biggest companies realized that they could not afford to do all the basic R&D. They agreed to collaborate in “pre-competitive” phase development through consortia such as IMEC and Sematech. IMEC is celebrating its 30th anniversary, and it’s interesting to recognize the signifi... » read more

Week In Review: Manufacturing, Design, Test
By Mark LaPedus - 31 Jan, 2014 - Comments: 0

The technology of 3D "bioprinting" (the medical application of 3D printing to produce living tissue and organs) is advancing so quickly that it will spark a major ethical debate on its use by 2016, according to Gartner. At the same time, 3D printing of non-living medical devices such as prosthetic limbs, combined with a burgeoning population and insufficient levels of healthcare in emerging mar... » read more

What’s After CMOS?
By Mark LaPedus - 24 Jan, 2014 - Comments: 3

Chipmakers continue to scale the CMOS transistor to finer geometries, but the question is for how much longer. The current thinking is that the CMOS transistor could scale at least to the 3nm node in the 2021 timeframe. And then, CMOS could run out of gas, prompting the need for a new switch technology. So what’s after the CMOS-based transistor? Carbon nanotubes and graphene get the most a... » read more

Germanium wedge-FETs pry away misfit dislocations
By Katherine Derbyshire - 23 Jan, 2014 - Comments: 1

Any approach to alternative channel integration must consider the lattice mismatch between silicon and other channel materials. Some schemes, such as IMEC’s selective epitaxy, view the lattice mismatch as an obstacle and look for ways to minimize its effects. This point of view certainly has merit: misfit dislocations do significantly degrade transistor performance. Still, back in 2011 Shu-Ha... » read more

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