tag: IP

It Takes A Village To Get A Design Done
By Ciarán Dunne - 18 Jun, 2018 - Comments: 0

No one lacks for brilliant ideas these days. In fact, it’s a golden age of innovation. But where the pace of innovation can slow is getting that idea to market. Take for example, the case of one of S3 Semiconductors' customers.. It recently developed a custom chip solution for a company in the oil and gas industry that was creating complex valve controllers that sensed pressure and tempera... » read more

IoT Wireless Battles Ahead
By Brian Bailey - 18 Jun, 2018 - Comments: 0

"The good thing about standards is that there are so many to choose from." – Andrew S. Tanebaum The extended version of that quote adds "furthermore, if you do not like any of them, you can just wait for next year's model." That could not be truer when it comes to IoT and wireless connectivity. Every standards group is rushing to create new versions of existing standards that use less p... » read more

Chip Dis-Integration
By Brian Bailey - 14 Jun, 2018 - Comments: 2

Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

Complexity, Reliability And Cost
By Ed Sperling - 14 Jun, 2018 - Comments: 0

Peter Schneider, director of Fraunhofer's Engineering of Adaptive Systems Division, sat down with Semiconductor Engineering to talk about future challenges in complexity, time to market and reliability issues, advanced packaging architectures, and the impact of billions of connected devices. What follows are excerpts of that discussion. SE: What is the biggest challenge you see in the semico... » read more

Don’t Be The Dinosaur On IP Reuse
By Ranjit Adhikary - 07 Jun, 2018 - Comments: 0

In today’s competitive marketplace, IP assets are becoming more critical and strategic than ever before. There is a general understanding among all design companies that one needs to invest and reuse IPs within the enterprise for faster realization of an IP sub-system or an SoCs. Unfortunately, from the start most companies have failed to adopt the processes for developing and reusing their I... » read more

designHUB: Design Reuse Made Real
By Cliosoft - 06 Jun, 2018 - Comments: 0

It’s no secret: You can’t get to market quickly or efficiently without integrating and re-using IP technology in your system-on-chip (SoC) design. In the past 10 years alone, design re-use has doubled to the point where today you’ll find more than 150 reused blocks comprising 60-70% of the die area in an average SoC. The companies most successful with their IP-reuse strategies are thos... » read more

The Week In Review: Design
By Jesse Allen - 01 Jun, 2018 - Comments: 0

Tools Real Intent launched Verix SimFix, an intent-driven verification solution for gate-level simulation (GLS) of digital designs designed to eliminate X-pessimism. SimFix uses mathematical methods to identify conditions under which pessimism can occur, and to determine the correct value when those conditions occur. It then generates files to use in simulation that detect and correct pessimis... » read more

Ensuring Chip Reliability From The Inside
By Ann Mutschler - 31 May, 2018 - Comments: 0

Monitoring activity and traffic is emerging as an essential ingredient in complex, heterogeneous chips used in automotive, industrial, and data center applications. This is particularly true in safety-critical applications such as automotive, where much depends on the system operating exactly right at all times. To make autonomous and assisted driving possible, a mechanism to ensure systems ... » read more

Analog Migration Equals Redesign
By Ann Mutschler - 24 May, 2018 - Comments: 1

Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

Measuring And Analyzing SoC Performance With Verdi Performance Analyzer
By Synopsys - 23 May, 2018 - Comments: 0

SoC performance is a key competitive advantage in the marketplace. The choice and configuration of SoC components—protocol IP and interconnects, is geared towards maximizing overall SoC performance. A case in point is the use of HBM (High Bandwidth Memory) technology and controllers. Currently in its third generation, HBM boasts high-performance while using less power in a substantially small... » read more

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