Chip Industry Week In Review


Samsung unveiled its latest 2nm and 4nm process nodes, plus its AI solutions during the Samsung Foundry Forum. The company also introduced an aggressive roadmap for the next few years that includes 3D-ICs with logic-on-logic, starting in 2025; custom HBM with built-in logic; backside power delivery on 2nm technology in 2027; and co-packaged optics. In presentations at the event, the company als... » read more

Chip Industry Technical Paper Roundup: May 21


New technical papers added to Semiconductor Engineering’s library this week. [table id=227 /] More ReadingTechnical Paper Library home » read more

Demonstrating The Feasibility Of The Foundry Model For Flexible Thin-Film Electronics 


A technical paper titled “Multi-project wafers for flexible thin-film electronics by independent foundries” was published by researchers at KU Leuven and imec. Abstract: "Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays, large-area image sensors, microprocessors, wearable healthcare patches, digital microfluidics and more. Although silicon-based co... » read more

Chip Industry Technical Paper Roundup: April 23


New technical papers recently added to Semiconductor Engineering’s library. [table id=216 /] Find last week’s technical paper additions here. » read more

Chip Industry Week In Review


Applied Materials may scale back or cancel its $4 billion new Silicon Valley R&D facility in light of the U.S. government's recent announcement to reduce funding for construction, modernization, or expansion of semiconductor research and development (R&D) facilities in the United States, according to the San Francisco Chronicle. TSMC could receive up to $6.6 billion in direct funding... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS


A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Superconducting Qubits Made Using Industry-Standard, Advanced Semiconductor Manufacturing (imec, KU Leuven)


A new technical paper titled "High-coherence superconducting qubits made using industry-standard, advanced semiconductor manufacturing" was published by researchers at imec and KU Leuven. Abstract: "The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers. As the complexity of quantum processors continues to grow, the ... » read more

Chip Industry Technical Paper Roundup: Feb. 13


New technical papers added to Semiconductor Engineering’s library this week. [table id=197 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review


By Jesse Allen, Linda Christensen, and Liz Allan.  The Biden administration plans to invest more than $5B  for semiconductor R&D and workforce support, including in the National Semiconductor Technology Center (NSTC), as part of the rollout of the CHIPS Act. Today's announcement included at least hundreds of millions for the NSTC workforce efforts, including creating a Workforce Cente... » read more

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches


A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven. Abstract: "Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not... » read more

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