Security Research: Technical Paper Round-up


A number of hardware security-related technical papers were presented at the August 2023 USENIX Security Symposium. Here are some highlights with associated links. [table id=130 /] A complete listing of all papers presented at this summer's USENIX conference can be found here and here. The organization provides open access research, and the presentation slides and papers are free to the p... » read more

Investigating The Ru/Ta Bilayer As An Alternative EUV Absorber To Mitigate Mask 3D Effects


A technical paper titled “Ru/Ta bilayer approach to EUV mask absorbers: Experimental patterning and simulated imaging perspective” was published by researchers at KU Leuven and imec. Abstract: "The optical properties and geometry of EUV mask absorbers play an essential role in determining the imaging performance of a mask in EUV lithography. Imaging metrics, including Normalized Imag... » read more

Formal Processor Model Providing Provably Secure Speculation For The Constant-Time Policy


A new technical paper titled "ProSpeCT: Provably Secure Speculation for the Constant-Time Policy" was published by researchers at imec-DistriNet, KU Leuven, CEA, and INRIA. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "We propose ProSpeCT, a generic formal processor model providing provably secure speculation for the constant-time policy. For constant-tim... » read more

Chip Industry’s Technical Paper Roundup: August 9


New technical papers recently added to Semiconductor Engineering’s library: [table id=124 /] More Reading Technical Paper Library home » read more

Programmable HW Accelerators For BGV Fully Homomorphic Encryption In The Cloud


A technical paper titled “BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption” was published by researchers at COSIC KU Leuven, Galois Inc., and Niobium Microsystems. Abstract: "Fully Homomorphic Encryption (FHE) allows for secure computation on encrypted data. Unfortunately, huge memory size, computational cost and bandwidth requirements limit its practic... » read more

Chip Industry’s Technical Paper Roundup: July 5


New technical papers recently added to Semiconductor Engineering’s library: [table id=114 /] (more…) » read more

Design of Selective Deposition Processes For Nanoscale Electronic Devices


A technical paper titled “Quantified Uniformity and Selectivity of TiO2 Films in 45-nm Half Pitch Patterns Using Area-Selective Deposition Supercycles” was published by researchers at IMEC, North Carolina State University, and KU Leuven. Abstract: "Area-selective deposition (ASD) shows great promise for sub-10 nm manufacturing in nanoelectronics, but significant challenges remain in scali... » read more

Addressing The Challenge Of Metallization In Highly Integrated (3D) Stretchable Electronics


A technical paper titled “Scalable electrodeposition of liquid metal from an acetonitrile-based electrolyte for highly-integrated stretchable electronics” was published by researchers at KU Leuven. Abstract: "For the advancement of highly-integrated stretchable electronics, the development of scalable sub-micrometer conductor patterning is required. Eutectic gallium indium EGaIn is an att... » read more

Chip Industry’s Technical Paper Roundup: June 27


New technical papers added to Semiconductor Engineering’s library this week. [table id=113 /]   » read more

A Field-Free Switching Solution For SOT Magnetic Tunnel Junction Devices


A technical paper titled “Field-Free Spin-Orbit Torque Driven Switching of Perpendicular Magnetic Tunnel Junction through Bending Current” was published by researchers at KU Leuven, ETH Zurich, and IMEC. Abstract: "Current-induced spin-orbit torques (SOTs) enable fast and efficient manipulation of the magnetic state of magnetic tunnel junctions (MTJs), making them attractive for memory, i... » read more

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