Week In Review: Manufacturing, Test

By Mark LaPedus - 02 Aug, 2019 - Comments: 0

Trade wars Talks between the United States and China continue to stall and the two nations are still embroiled in a trade war. So this week, U.S. President Donald Trump would like to impose a 10% tariff on the remaining $300 billion list of China-based imports starting Sept. 1, according to a report from Reuters. This in turn will impact the electronics and IC industries. In response to the... » read more

Inspection, Metrology Challenges Grow For SiC

By Mark LaPedus - 11 Jun, 2019 - Comments: 2

Inspection and metrology are becoming more critical in the silicon carbide (SiC) industry amid a pressing need to find problematic defects in current and future SiC devices. Finding defects always has been a challenging task for SiC devices. But it’s becoming more imperative to find killer defects and reduce them as SiC device vendors begin to expand their production for the next wave of a... » read more

EUV Pellicle, Uptime And Resist Issues Continue

By Mark LaPedus - 26 Sep, 2018 - Comments: 0

Extreme ultraviolet (EUV) lithography is moving closer to realization, but several problems involving scanner uptime, photoresists and pellicles need to be resolved before this long-overdue technology is put into full production. Intel, Samsung and TSMC are hoping to insert EUV into production at 7nm and/or 5nm. While the remaining issues don’t necessarily pre-empt using EUV, they do affec... » read more

What’s Missing In EUV?

By Mark LaPedus - 17 May, 2018 - Comments: 0

Extreme ultraviolet (EUV) lithography is expected to move into production at 7nm and/or 5nm, but as previously reported, there are some gaps in the arena. At one time, the power source was the big problem, but that appears to be solved in the near term. Now, a phenomenon called stochastic effects, or random variations, are the biggest challenge for EUV lithography. But at most events, th... » read more

Searching For EUV Mask Defects

By Mark LaPedus - 19 Oct, 2017 - Comments: 2

Chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm, but several challenges need to be solved before this technology can be used in production. One lingering issue that is becoming more worrisome is how to find [gettech id="31045" comment="EUV"] mask defects. That isn't the only issue, of course. The industry continues to work on the power source and resists. Bu... » read more

5 Takeaways From BACUS

By Mark LaPedus - 22 Sep, 2016 - Comments: 0

As usual, the recent SPIE Photomask Technology Conference, sometimes called BACUS, was a busy event. The event, which took place in San Jose, Calif., featured presentations on the usual subjects in the photomask sector. There were presentations on mask writers, inspection, metrology, repair and cleaning. And, of course, the papers included masks based on extreme ultraviolet (EUV) lithography... » read more

Mask Maker Worries Grow

By Mark LaPedus - 18 Aug, 2016 - Comments: 2

Leading-edge photomask makers face a multitude of challenges as they migrate from the 14nm node and beyond. Mask making is becoming more challenging and expensive at each node on at least two fronts. On one front, mask makers must continue to invest in the development of traditional optical masks at advanced nodes. On another front, several photomask vendors are preparing for the possible ra... » read more

Gaps Remain For EUV Masks

By Mark LaPedus - 02 Oct, 2015 - Comments: 4

Extreme ultraviolet (EUV) lithography is once again at a critical juncture. The oft-delayed technology is now being targeted for 7nm. But there are still a number of technologies that must come together before EUV is inserted into mass production at that node. First, the EUV source must generate more power. Second, tool uptime must improve. Third, the industry needs better EUV resists. A... » read more

5 Disruptive Mask Technologies

By Mark LaPedus - 19 Feb, 2015 - Comments: 0

Photomask complexity and costs are increasing at each node, thereby creating a number of challenges on several fronts. On one front, for example, traditional single-beam e-beam tools are struggling to keep up with mask complexity. As a result, the write times and costs continue to rise. Mask complexity also impacts the other parts of the tool flow, such as inspection, metrology and repair. I... » read more

Challenges Mount For EUV Masks

By Mark LaPedus - 16 Oct, 2014 - Comments: 2

Five years ago, Intel urged the industry to invest millions of dollars in the photomask infrastructure to help enable extreme ultraviolet ([gettech id="31045" comment="EUV"]) lithography. At the time, there were noticeable gaps in EUV, namely defect-free masks and inspection tools. To date, however, Intel’s call to action has produced mixed results. The photomask industry is making progr... » read more

Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Lasertec