Chip Industry’s Technical Paper Roundup: June 27


New technical papers added to Semiconductor Engineering’s library this week. [table id=113 /]   » read more

All-Silicon Quantum Light Source Based On A Single Atomic Emissive Center


A technical paper titled “All-silicon quantum light source by embedding an atomic emissive center in a nanophotonic cavity” was published by researchers at University of California Berkeley and Lawrence Berkeley National Laboratory. Abstract: "Silicon is the most scalable optoelectronic material but has suffered from its inability to generate directly and efficiently classical or quantum ... » read more

Chip Industry’s Technical Paper Roundup: June 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=109 /] Further Reading Technical Paper Home » read more

Extreme Fast Charging by Regulating Lithium-Ion Batteries’ Self-Generated Heat Via Active Thermal Switching


A technical paper titled “Extreme fast charging of commercial Li-ion batteries via combined thermal switching and self-heating approaches” was published by researchers at Lawrence Berkeley National Laboratory, the University of California, Berkeley, and the Hong Kong University of Science and Technology. Abstract: "The mass adoption of electric vehicles is hindered by the inadequate ext... » read more

Research Bits: May 2


Reconfigurable FeHEMT Researchers at the University of Michigan created a reconfigurable ferroelectric transistor that could enable a single amplifier to do the work of multiple conventional amplifiers. “By realizing this new type of transistor, it opens up the possibility for integrating multifunctional devices, such as reconfigurable transistors, filters and resonators, on the same plat... » read more

Week In Review: Design, Low Power


Arm and Intel Foundry Services inked a multi-generation agreement to enable chip designers to build Arm-based SoCs on the Intel 18A process. The initial focus is mobile SoC designs, but the deal allows for potential expansion into automotive, IoT, data center, aerospace, and government applications. IFS and Arm will undertake design technology co-optimization (DTCO) to optimize chip design and ... » read more

Research Bits: March 6


2D TMDs on silicon Engineers at MIT, University of Texas at Dallas, Institute for Basic Science, Sungkyunkwan University, Washington University in St. Louis, University of California at Riverside, ISAC Research, and Yonsei University found a way to grow 2D materials on industry-standard silicon wafers while preserving their crystalline form. Using a new “nonepitaxial, single-crystalline g... » read more

Research Bits: Jan. 31


The power of proximity Researchers from Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab), Stanford, and University of California Berkeley have observed that electrons transfer heat rapidly between layers of the 2D semiconductor materials tungsten diselenide (WSe2) and tungsten disulfide (WS2). The electrons acted as a bridge between the two materials, the layers of... » read more

Week In Review: Design, Low Power


With funding from the Semiconductor Research Corporation, a group of 10 universities is banding together to create the Processing with Intelligent Storage and Memory center, or PRISM, led by University of California San Diego. The $50.5 million PRISM center will focus on four different themes: novel memory and storage devices and circuits; next generation architectures; systems and software; an... » read more

Research Bits: Nov. 15


Low temperature 3D bonding Scientists from Osaka University developed a new method for the direct three-dimensional bonding of copper electrodes using silver layers. The method works at low temperatures and does not require external pressure. "Our process can be performed under gentle conditions, at relatively low temperatures and without added pressure, but the bonds were able to withstand... » read more

← Older posts Newer posts →