New Roadmap For Electronics


Tech Talk: Melissa Grupen-Shemansky, CTO for SEMI’s FlexTech Group and Advanced Packaging program, looks at what’s changing now that Moore’s Law is slowing, and how packaging is changing as the traditional physical boundaries of electronics begin breaking down. https://youtu.be/UpH1m8Oru90 » read more

Fabs Meet Machine Learning


Aki Fujimura, chief executive of D2S, sat down with Semiconductor Engineering to discuss Moore’s Law and photomask technology. Fujimura also explained how artificial intelligence and machine learning are impacting the IC industry. What follows are excerpts of that conversation. SE: For some time, you’ve said we need more compute power. So we need faster chips at advanced nodes, but cost... » read more

Low Power Coverage


Through real design examples and case studies, this paper demonstrates how to achieve comprehensive low power design verification closure with all possible sources of power states, their transition coverage, and cross-coverage of power domains of interdependent states. As well the paper proposes a mechanism to combine and represent LP and non-LP coverage in a unified and adaptable database with... » read more

Adding NoCs To FPGA SoCs


FPGA SoCs straddle the line between flexibility and performance by combining elements of both FPGAs and ASICs. But as they find a home in more safety- and mission-critical markets, they also are facing some of the same issues as standard SoCs, including the ability to move larger and larger amounts of data quickly throughout an increasingly complex device, and the difficulty in verifying and de... » read more

Emulation-Driven Implementation


Tech Talk: Haroon Chaudhri, director of Prime Power at Synopsys, talks about how to shorten time to market and increase confidence in advanced-node designs, while also reducing the amount of guard-banding and improving design freedom. https://youtu.be/xT3CIqjnaBk » read more

Tech Talk: Connected Intelligence


Gary Patton, CTO at GlobalFoundries, talks about computing at the edge, the slowdown in scaling, and why new materials and packaging approaches will be essential in the future. https://youtu.be/Zbz0R_yFFrQ » read more

Near-Threshold Issues Deepen


Complex issues stemming from near-threshold computing, where the operating voltage and threshold voltage are very close together, are becoming more common at each new node. In fact, there are reports that the top five mobile chip companies, all with chips at 10/7nm, have had performance failures traced back to process variation and timing issues. Once a rather esoteric design technique, near... » read more

Tech Talk: 5G Everywhere


Sarah Yost, senior product marketing manager at National Instruments, talks about the promise of 5G, where it works and where it doesn’t work, and why it’s so critical for so many different markets. https://youtu.be/CzxdrrhSvGY » read more

Chipmakers Look Beyond Scaling


Gary Patton, CTO of GlobalFoundries, sat down with Semiconductor Engineering to discuss the rollout of EUV, the rising cost of designing chips at the most advanced nodes, and the growing popularity of 22nm planar FD-SOI in a number of markets. What follows are excerpts of that conversation. SE: You've just begun deploying EUV. Are you experiencing any issues? Patton: It's a very complicat... » read more

Tech Talk: MCU Memory Options


David Eggleston, vice president of embedded memory at GlobalFoundries, talks about the pros and cons of embedded non-volatile memory versus system in package. https://youtu.be/6KoQTFbFVCo » read more

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