Hardware Based Monitoring For Zero Trust Environments


A technical paper titled "Towards Hardware-Based Application Fingerprinting with Microarchitectural Signals for Zero Trust Environments" was published by the Air Force Institute of Technology. Abstract "The interactions between software and hardware are increasingly important to computer system security. This research collects sequences of microprocessor control signals to develop machine ... » read more

Looking Beyond TOPS/W: How To Really Compare NPU Performance


There is a lot more to understanding the true capabilities of an AI engine beyond TOPS per watt. A rather arbitrary measure of the number of operations of an engine per unit of power, the TOPS/W metric completely misses the point that a single operation on one engine may accomplish more useful work than a multitude of operations on another engine. In any case, TOPS/W is by no means the only spe... » read more

How AI Drives Faster Verification Coverage And Debug For First-Time-Right Silicon


By Taruna Reddy and Robert Ruiz These days, the question is less about what AI can do and more about what it can’t do. From talk-of-the-town chatbots like ChatGPT to self-driving cars, AI is becoming pervasive in our everyday lives. Even industries where it was perhaps an unlikely fit, like chip design, are benefiting from greater intelligence. What if one of the most laborious, time-co... » read more

AI Benchmarks Are Broken


Artificial Intelligence (AI) is shaping up to be one of the most revolutionary technologies of our time. By now you’ve probably heard that AI’s impact will transform entire industries, from healthcare to finance to entertainment, delivering us richer products, streamlined experiences, and augment human productivity, creativity, and leisure. Even non-technologists are getting a glimpse of... » read more

FPGAs: Automated Framework For Architecture-Space Exploration of Approximate Accelerators


A technical paper titled "autoXFPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems" was published (preprint) by researchers at TU Wien, Brno University of Technology, and NYUAD. Abstract "Generation and exploration of approximate circuits and accelerators has been a prominent research domain exploring energy-efficiency and/or performance... » read more

Spark On AWS Graviton2 Best Practices: K-Means Clustering Case Study


This report focuses on how to tune a Spark application to run on a cluster of instances. We define the concepts for the cluster/Spark parameters, and explain how to configure them given a specific set of resources. We use a K-Means machine learning algorithm as a case study to analyze and tune the parameters to achieve the required performance while optimally using the available resources. W... » read more

A Hierarchical And Tractable Mixed-Signal Verification Methodology For First-Generation Analog AI Processors


Artificial intelligence (AI) is now the key driving force behind advances in information technology, big data and the internet of things (IoT). It is a technology that is developing at a rapid pace, particularly when it comes to the field of deep learning. Researchers are continually creating new variants of deep learning that expand the capabilities of machine learning. But building systems th... » read more

Test Challenges Mount As Demands For Reliability Increase


An emphasis of improving semiconductor quality is beginning to spread well beyond just data centers and automotive applications, where ICs play a role in mission- and safety-critical applications. But this focus on improved reliability is ratcheting up pressure throughout the test community, from lab to fab and into the field, in products where transistor density continues to grow — and wh... » read more

AI: Engineering Tool Or Threat To Jobs?


Semiconductor Engineering sat down to talk about using AI for designing and testing complex chips with Michael Jackson, corporate vice president for R&D at Cadence; Joel Sumner, vice president of semiconductor and electronics engineering at National Instruments; Grace Yu, product and engineering manager at Meta; David Pan, professor in the Department of Electrical and Computer Engineering a... » read more

HW-SW Co-Design Solution For Building Side-Channel-Protected ML Hardware


A technical paper titled "Hardware-Software Co-design for Side-Channel Protected Neural Network Inference" was published (preprint) by researchers at North Carolina State University and Intel. Abstract "Physical side-channel attacks are a major threat to stealing confidential data from devices. There has been a recent surge in such attacks on edge machine learning (ML) hardware to extract the... » read more

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