Deep Reinforcement Learning to Dynamically Configure NoC Resources


New research paper titled "Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems" from Md Farhadur Reza at Eastern Illinois University. Find the open access technical paper here. Published June 2022. M. F. Reza, "Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energ... » read more

Research Bits: June 14


Photonic deep neural network chip Engineers from the University of Pennsylvania built a photonic deep neural network on a 9.3 square millimeter chip they say is faster and more efficient at classifying images, with the ability to process nearly two billion images a second. The chip uses a series of waveguides that form 'neutron layers' mimicking the brain. “Our chip processes information ... » read more

AlphaGo Game Influences Argonne’s New AI Tool For Materials Discovery


Research paper titled "Learning in continuous action space for developing high dimensional potential energy models" from researchers at Argonne National Lab with contributions from Oak Ridge National Laboratory. Abstract "Reinforcement learning (RL) approaches that combine a tree search with deep learning have found remarkable success in searching exorbitantly large, albeit discrete action ... » read more

Active Learning: Integrating Natural Intelligence Into Artificial Intelligence


Today, very few people would likely deny the fact that data can present major added value for companies. But analyzing data from production processes reveals the incompleteness of data collection and the associated reduced potential of the data that can be leveraged. Typical shortcomings include: Incomplete representation of processes in the dataspace, Inadequate connection of processes... » read more

AI-Powered Verification


With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient. Artificial intelligence (AI) and machine learning (ML) are being tested to see how big an impact they can have. While there is progress, it still appears to be just touching the periphery of the problem... » read more

CFU Playground: Significant Speedups & Design Space Exploration Between CPU & Accelerator


Technical paper titled "CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs," from Google, Purdue University and Harvard University. Abstract "We present CFU Playground, a full-stack open-source framework that enables rapid and iterative design of machine learning (ML) accelerators for embedded ML systems. Our toolchain tightly integr... » read more

Improving PPA With AI


AI/ML/DL is starting to show up in EDA tools for a variety of steps in the semiconductor design flow, many of them aimed at improving performance, reducing power, and speeding time to market by catching errors that humans might overlook. It's unlikely that complex SoCs, or heterogeneous integration in advanced packages, ever will be perfect at first silicon. Still, the number of common error... » read more

NVMe-oF: Simple, Invisible Fabric For Distributed Storage Networks


In today’s fast paced world, we need seamless access to huge chunks of data and new-world technologies, such as artificial intelligence (AI), machine learning (ML), cloud computing, and real-time data analytics. AI researchers are deriving applications such as cyber security analysis and intelligent virtual assistants (IVA) where the computer needs to process an intense amount of data. Theref... » read more

Novel H2H mapping algorithm with both computation and communication awareness


New research paper "H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness" from University of Pittsburgh, Georgia Tech. Abstract: "The complex nature of real-world problems calls for heterogeneity in both machine learning (ML) models and hardware systems. The heterogeneity in ML models comes from multi-sensor perceiving and multi-task lear... » read more

AI-Based Method to Prune the Design Space of Heterogeneous NoCs


Abstract "Often suffering from under-optimization, Networks-on-Chip (NoCs) heavily impact the efficiency of domain-specific Systems-on-Chip. To cope with this issue, heterogeneous NoCs are promising alternatives. Nevertheless, the design of optimized NoCs satisfying multiple performance objectives is extremely challenging and requires significant expertise. Prior works failed to combine many... » read more

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