Week In Review: Manufacturing, Test

By Mark LaPedus - 30 Oct, 2020 - Comments: 0

Trade and government The U.S. continues to tighten its export controls for hi-tech, including a move to restrict fab technologies that enable 5nm chip production. The U.S. Department of Commerce has imposed controls on six more technologies, bringing the total to 37. They include: hybrid additive manufacturing/computer controlled tools; computational lithography software designed for EUV masks... » read more

Week In Review: Design, Low Power

By Jesse Allen - 30 Oct, 2020 - Comments: 0

M&A AMD will acquire Xilinx for $35 billion in an all-stock deal. "Joining together with AMD will help accelerate growth in our data center business and enable us to pursue a broader customer base across more markets,” said Victor Peng, Xilinx president and CEO. The deal is expected to close by the end of 2021. The acquisition of the programmable logic giant will leave only a few purepla... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 30 Oct, 2020 - Comments: 0

Automotive Synopsys added support for Infineon's automotive AI chip, the AURIX TC4xx 32-bit microcontroller with parallel processing unit. Dialog Semiconductor announced automotive qualification for its DA7280 high-definition haptic driver. The company Alps Alpine is using the DA7280 in Alps Alpine Heavy, the latest version of its HAPTIC Reactor Linear Resonant Actuators (LRAs). Bosch, M... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 09 Oct, 2020 - Comments: 0

Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 02 Oct, 2020 - Comments: 0

Security Synopsys’ Cybersecurity Research Center disclosed that its research resulted in three Common Vulnerability and Exposures (CVE) advisories on wireless router chipsets that have partial authentication bypass vulnerabilities. The vulnerability lets an attacker send an unencrypted data frame through a WPA2-protected WLAN, which will may respond with an encrypted data frame that the atta... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 04 Sep, 2020 - Comments: 0

AI on edge Cadence’s Tensilica Vision P6 DSP IP will be in Kneron’s KL720, a 1.4TOPS AI system-on-chip (SoC) targeted for AI of things (AIoT), smart home, smart surveillance, security, robotics and industrial control applications. Arm announced its Arm Cortex-R82, a 64-bit, Linux-capable Cortex-R processor for enterprise and computational storage systems. The processor is designed to pr... » read more

New Architectures, Much Faster Chips

By Ed Sperling and Ann Mutschler - 31 Aug, 2020 - Comments: 0

The chip industry is making progress in multiple physical dimensions and with multiple architectural approaches, setting the stage for huge performance increases based on more modular and heterogeneous designs, new advanced packaging options, and continued scaling of digital logic for at least a couple more process nodes. A number of these changes have been discussed in recent conferences. I... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 28 Aug, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT Marvell is working on silicon for the data infrastructure market using TSMC’s 5nm process node. Marvell says it has multiple designs already under contract for its 5nm portfolio across the carrier, enterprise, automotive, and data center markets. The first products are sampling by the end of next year. Ansys’ multiphysics signoff tools, R... » read more

Moore’s Law Enters The 4th Dimension

By Ed Sperling - 21 Aug, 2020 - Comments: 5

The basic idea that more transistors are better hasn't changed in more than half a century. In fact, the overriding theme of a number of semiconductor conferences this month is that we will never have enough compute capability or storage capacity. In the past, when the number of transistors in a given area actually did double every 18 to 24 months, increasing density per square millimeter fo... » read more

Chiplet Reliability Challenges Ahead

By Ed Sperling - 12 Aug, 2020 - Comments: 2

Assembling chips using LEGO-like hard IP is finally beginning to take root, more than two decades after it was first proposed, holding the promise of faster time to market with predictable results and higher yield. But as these systems of chips begin showing up in mission-critical and safety-critical applications, ensuring reliability is proving to be stubbornly difficult. The main driver fo... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Marvell

Week In Review: Manufacturing, Test

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Auto, Security, Pervasive Computing

New Architectures, Much Faster Chips

Week In Review: Auto, Security, Pervasive Computing

Moore’s Law Enters The 4th Dimension

Chiplet Reliability Challenges Ahead