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Week In Review: Design, Low Power

Siemens buys meshless CFD; die-to-die controller IP; cloud-based FPGA prototyping.

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Siemens Digital Industries Software acquired Nextflow Software, a provider of advanced particle-based computational fluid dynamics (CFD) solutions. Nextflow Software will become part of the Simcenter software portfolio, providing rapid meshless CFD capabilities to accelerate the analysis of complex transient applications in the automotive, aerospace, and marine industries such as gear box lubrication, tank sloshing or electric motor spray cooling. “Our customers need to leverage sophisticated simulations earlier and more often in their design process, and this is creating a strong demand for rapid and automated CFD of dynamic gas-liquid flows,” said Jean-Claude Ercolanelli, Senior Vice President, Simulation and Test Solutions, Siemens Digital Industries Software. “Meshless technology has emerged as a leading solution to greatly reduce the setup and solving times for this class of problems, accelerating time to results and prove the behavior of products at a reduced time and cost.” Nextflow Software was founded in 2015 and based in Nantes, France. Terms of the deal were not disclosed.

Tools & IP
Synopsys debuted its new DesignWare Die-to-Die Controller IP. It complements the company’s existing 112G USR/XSR PHY IP for a complete die-to-die IP solution. The controller provides error correction mechanisms with replay and optional forward error correction minimize bit error rate. “Interconnect technology is increasingly vital for the next-generation of performant, customized infrastructure SoCs,” said Jeff Defilippi, director of product management, Infrastructure Line of Business, Arm. “With its low-latency, native support for AMBA CXS, Synopsys DesignWare Die-to-Die Controller can easily integrate with the Arm Coherent Mesh Network to provide our mutual customers access to the multichip IP solutions offering new scale-up performance and composability options required for this next era of infrastructure compute.”

Aldec launched HES-DVM Proto Cloud Edition (CE). Available through Amazon Web Service (AWS), HES-DVM Proto CE can be used for FPGA-based prototyping of SoC/ASIC designs and has a focus on automated design partitioning to reduce bring-up time when up to four FPGAs are needed to accommodate a design. It can be used with Aldec’s HES pre-silicon prototyping boards, third party boards, or in-house platforms and is available on a monthly basis.

EdgeCortix utilized Cadence verification and digital tools to accelerate the design and verification of its edge AI chips. In particular, EdgeCortix said VIP for the Arm AMBA 3/4 AXI standard and XceliumTM Logic Simulation enabled it to shorten its verification environment’s development to less than a month, while the Genus Synthesis Solution and Joules RTL Power Solution delivered a 2X reduction in power analysis time with better PPA.

Siemens Digital Industries Software’s Calibre nmPlatform tools and Analog FastSPICE platform were both qualified for TSMC’s advanced N3 and N4 processes.

Synopsys said that its DesignWare Interface, Logic Library, Embedded Memory and PVT monitor IP  was used by customers across more than 20 leading semiconductor companies to achieve multiple first-pass silicon successes on TSMC’s N5 process.

Kandou released a USB-C multiprotocol retimer solution with USB4 support. It aims to extend the length of PCB traces while maintaining low latency and can be located up to approximately 16 inches (40cm) away from the main host SoC using low-cost PCB materials while maintaining signal integrity. Target consumer applications include desktop and mobile PCs, tablets, and peripheral devices.

Embedded
Arm announced two new initiatives aimed at improving productivity of embedded, IoT, ML, and MCU software development. In the first, Arm is moving parts of its Common Microcontroller Software Interface Standard (CMSIS), which is a vendor-independent abstraction layer for microcontrollers, specifically for Arm Cortex-M processors, to an open project called Open-CMSIS-Pack. The project will deliver infrastructure to integrate and manage software components and improve code reuse across projects. In the second, the Keil Studio Cloud is moving into an open beta phase. It provides a cloud-hosted platform with direct Git integration and modern CI workflows for rapid IoT device development.

Siemens Digital Industries Software’s Nucleus ReadyStart embedded development software for Arm-based devices was updated to provide enhanced support for the Arm Cortex family of processors. Updates include an expanded debug agent, as well as new functionality for enhanced security, usability and platform stability.

Power
Infineon expanded its portfolio of single-channel gate-driver ICs. The new EiceDRIVER 1EDB family of single-channel gate-driver IC provides galvanic input-to-output isolation of 3 kV rms (UL 1577) for rugged ground-loop separation. Their common-mode transient immunity (CMTI) exceeds 300 V/ns, targeting hard switching applications enabling numerous topologies.

Osram used Infineon’s NLM0011 and NLM0010 dual-mode NFC wireless configuration ICs with pulse width modulation (PWM) in its OPTOTRONIC FIT product family to make it easier to configure LEDs during production and installation.

Memory
Marvell debuted PCIe 5.0 SSD controllers for cloud storage. Also supporting NVMe 1.4b, the SSD controller family enables up to 14 GB/s of throughput and 2 million random read IOPS while providing security features including FIPS-compliant root of trust (RoT), AES 256-bit encryption, and multi-key revocation.

Micron Technology said it is shipping LPDDR4x DRAM based on its 1α node, which provides a 40% improvement in memory density and up to 20% improvement in power savings for mobile use cases over the company’s previous node, this month. It also completed validation of its 1α-based DDR4 on leading data center platforms. Micron also said it has delivered its first PCIe Gen4 SSDs built with 176-layer 3D NAND. The new SSDs target professional workstations to ultrathin notebooks. Micron also announced a Universal Flash Storage (UFS) 3.1 solution for automotive applications that utilizes 128GB and 256GB densities of its 96-layer NAND.

Samsung Electronics announced an enterprise SSD using Zoned Namespace (ZNS) technology. ZNS allows data to be grouped based on their usage and access frequency, and stored sequentially in independent zones within an SSD, with the aim to maximize available user capacity and offer an extended lifespan in storage server, data center, and cloud environments.

Brite Semiconductor uncorked ONFI (Open NAND Flash Interface) 4.2 IO and Physical Layer IP based on SMIC’s 14nm finFET process. The IO supports SDR/NV-DDR/NV-DDR2 1.8V, NV-DDR3 1.2V, and the physical layer IP adopts full digital design with features aimed at low power consumption and small area.

Quantum computing, HPC, optics
The Japanese government is forming a public-private partnership to focus on quantum computing research and development. It will be comprised of about 50 businesses, including Toshiba, NEC, Fujitsu, Hitachi, and Toyota, according to Nikkei Asia. “It’s difficult for a single company to do comprehensive work in the field on its own,” said Shintaro Sato, head of quantum computing development at Fujitsu. “We want broad partnerships in industry, government and academia, without limiting them to particular points.”

AMD showed its 3D chiplet technology with a 3D vertical cache bonded to an AMD Ryzen 5000 Series processor prototype. Developed with TSMC, AMD said it is using a hybrid bond approach that provides over 200 times the interconnect density of 2D chiplets and more than 15 times the density compared to existing 3D packaging solutions, while consuming less energy. The company is expecting to begin production of high-end computing products with 3D chiplets by the end of this year.

STMicroelectronics will work on developing manufacturing processes for Metalenz’s meta-optics technology in a co-development and licensing agreement. Metalenz’s technology uses meta-surfaces containing nanostructures that bend light, allowing it to combine multiple optical functions into a single flat layer. ST plans to use lithographic masks to build tunable diffractive-wavefront layers on the meta-surface. It will initially target NIR wavelengths, which are used in 3D sensing functions, such as face identification, autofocus assist, mini-LIDAR, and AR/VR depth mapping on smartphones. Metalenz is a spin-out of Harvard University.



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