Modeling electrical conduction in resistive-switching memory through machine learning


Published in AIP Advances on July 13, 2021. Read the full paper (open access). Abstract Traditional physical-based models have generally been used to model the resistive-switching behavior of resistive-switching memory (RSM). Recently, vacancy-based conduction-filament (CF) growth models have been used to model device characteristics of a wide range of RSM devices. However, few have focused o... » read more

On the Road To Higher Memory Bandwidth


In the decade since HBM was first announced, we’ve seen two-and-a-half generations of the standard come to market. HBM’s “wide and slow” architecture debuted first at a data rate of 1 gigabit per second (Gbps) running over a 1024-bit wide interface. The product of that data rate and that interface width provided a bandwidth of 128 gigabytes per second (GB/s). In 2016, HBM2 doubled the s... » read more

Will Monolithic 3D DRAM Happen?


As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the third dimension to the architecture. There are two ways to accomplish that. One is in a package, which is already happening. The second is to sale the die into the Z axis, which which has been a to... » read more

New Memories Add New Faults


New non-volatile memories (NVM) bring new opportunities for changing how we use memory in systems-on-chip (SoCs), but they also add new challenges for making sure they will work as expected. These new memory types – primarily MRAM and ReRAM – rely on unique physical phenomena for storing data. That means that new test sequences and fault models may be needed before they can be released t... » read more

Why TinyML Is Such A Big Deal


While machine-learning (ML) development activity most visibly focuses on high-power solutions in the cloud or medium-powered solutions at the edge, there is another collection of activity aimed at implementing machine learning on severely resource-constrained systems. Known as TinyML, it’s both a concept and an organization — and it has acquired significant momentum over the last year or... » read more

A New Vision For Memory Chip Design And Verification


Discrete memory chips are arguably the most visible reminder of the opportunities and challenges for advanced semiconductor design. They are manufactured in huge quantities, becoming key drivers for new technology nodes and new fabrication processes. Price fluctuations have a major impact on the financial health of the electronics industry, and any shortages can shut down the manufacturing line... » read more

Servers And The Drive to DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

How Chips Will Change Health Care


Jo De Boeck, chief strategy officer and executive vice president at imec, sat down with Semiconductor Engineering to talk about the intersection of medical and semiconductor technology, what's changing in how chips are being used, and what will happen in the short term and long-term. What follows are excerpts of that discussion. SE: Medical technology never advanced at the rate everybody... » read more

Micron B47R 3D CTF CuA NAND Die, World’s First 176L (195T)


Micron’s 176L 3D NAND is the world’s first 176L 3D NAND Flash memory. TechInsights just found the 512Gb 176L die (B47R die markings) and quickly viewed its process, structure, and die design. Micron 176L 3D NAND is one of the most groundbreaking technologies to date, and it is especially for the storage application such as data center, 5G, AI, cloud, intelligent edge, and mobile devices. Mi... » read more

Time To Rethink Memory Chip Design And Verification


It’s no secret to anyone that semiconductor development grows more challenging all the time. Each new process technology node packs more transistors into each die, creating more electrical issues and making heat dissipation harder. Floorplanning, logic synthesis, place and route, timing analysis, electrical analysis, and functional verification stretch electronic design automation (EDA) tools... » read more

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