Overcoming Challenges In Next-Generation SRAM Cell Architectures

By Benjamin Vincent - 18 Mar, 2021 - Comments: 0

Static Random-Access Memory (SRAM) has been a key element for logic circuitry since the early age of the semiconductor industry. The SRAM cell usually consists of six transistors connected to each other in order to perform logic storage and other functions. The size of the 6T (6 Transistors) SRAM cell has shrunk steadily over the past decades, thanks to Moore’s Law and the size reduction of t... » read more

HBM2E Raises The Bar For AI/ML Training

By Frank Ferro - 11 Mar, 2021 - Comments: 0

The largest AI/ML neural network training models now exceed an enormous 100 billion parameters. With the rate of growth over the last decade on a 10X annual pace, we’re headed to trillion parameter models in the not-too-distant future. Given the tremendous value that can be derived from AI/ML (it is mission critical to five of six of the top market cap companies in the world), there has been ... » read more

MRAM Evolves In Multiple Directions

By Bryon Moyer - 11 Mar, 2021 - Comments: 1

Magnetoresistive RAM (MRAM) is one of several new non-volatile memory technologies targeting broad commercial availability, but designing MRAM into chips and systems isn't as simple as adding other types of memory. MRAM isn’t an all-things-for-all-applications technology. It needs to be tuned for its intended purpose. MRAMs targeting flash will not do as well targeting SRAMs, and vice vers... » read more

Usage Models Driving Data Center Architecture Changes

By Ann Mutschler - 11 Feb, 2021 - Comments: 0

Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

Fearless Chip Forecasts For 2021

By Mark LaPedus - 21 Jan, 2021 - Comments: 0

It’s been a roller coaster ride in the semiconductor industry. In early 2020, the semiconductor business looked bright, but then the Covid-19 pandemic struck, causing a sudden downturn. By mid-2020, though, the market bounced back, as the stay-at-home economy drove demand for computers, tablets and TVs. The chip market ended on a high note in 2020, but the question is, what’s in store fo... » read more

Hidden Costs In Faster, Low-Power AI Systems

By Ed Sperling - 20 Jan, 2021 - Comments: 1

Chipmakers are building orders of magnitude better performance and energy efficiency into smart devices, but to achieve those goals they also are making tradeoffs that will have far-reaching, long-lasting, and in some cases unknown impacts. Much of this activity is a direct result of pushing intelligence out to the edge, where it is needed to process, sort, and manage massive increases in da... » read more

More Data, More Memory-Scaling Problems

By Bryon Moyer - 14 Jan, 2021 - Comments: 0

Memories of all types are facing pressures as demands grow for greater capacity, lower cost, faster speeds, and lower power to handle the onslaught of new data being generated daily. Whether it's well-established memory types or novel approaches, continued work is required to keep scaling moving forward as our need for memory grows at an accelerating pace. “Data is the new economy of this ... » read more

Five Key Changes Coming With DDR5 DIMMs

By John Eble - 14 Jan, 2021 - Comments: 0

On July 14th of last year, JEDEC announced the publication of the DDR5 SDRAM standard. This signaled the nearing industry transition to DDR5 server dual-inline memory modules (DIMM). DDR5 memory brings a number of key enhancements that will bring great performance and power benefits in next generation servers. Scaling Data Rates to 6.4 Gb/s You can never have enough memory bandwidth, and DD... » read more

Process Window Optimization Of DRAM By Virtual Fabrication

By Daebin Yim - 21 Dec, 2020 - Comments: 0

New integration and patterning schemes used in 3D memory and logic devices have created manufacturing and yield challenges. Industrial focus has shifted from the scaling of predictable unit processes in 2D structures to the more challenging full integration of complex 3D structures. Conventional 2D layout DRC, offline wafer metrology, and offline electrical measurements are no longer sufficient... » read more

What Designers Need to Know About Error Correction Code (ECC) In DDR Memories

By Vadhiraj Sankaranarayanan - 10 Dec, 2020 - Comments: 2

As with any electronic system, errors in the memory subsystem are possible due to design failures/defects or electrical noise in any one of the components. These errors are classified as either hard-errors (caused by design failures) or soft-errors (caused by system noise or memory array bit flips due to alpha particles, etc.). To handle these memory errors during runtime, the memory subsyst... » read more

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Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.