Extending RISC-V Processors In The Field With Codasip Studio & Menta eFPGA


RISC-V is an open specification that allows an infinite number of implementations. But RISC-V goes beyond that and encourages processor architects to add new instructions to accelerate certain algorithms or application domains, for example DSP, AI/ML, and others, while keeping the base instruction set stable. The new instructions may help with the performance, code size, power consumption, or d... » read more

Startup Funding: February 2022


Mega-rounds dominated venture funding in February, with ten companies seeing investment of $100 million or more, five of which exceeded $200 million. Automotive was the big winner, with seven of the ten companies involved in either developing ADAS and autonomous driving, building electric vehicles, or making components to go in cars. The largest round of the month falls into that last category,... » read more

Week In Review: Design, Low Power


Intel intends to take Mobileye public in mid-2022 on a US market through an IPO of newly issued stock. The subsidiary, which Intel acquired in 2017, develops SoCs for ADAS and autonomous driving solutions. Mobileye has achieved record revenue year-over-year with 2021 gains expected to be more than 40 percent higher than 2020, highlighting the powerful benefits to both companies of our ongoing p... » read more

Week In Review: Design, Low Power


RISC-V RISC-V International CEO Calista Redmond provided an update on the state of the community during the annual RISC-V Summit: “RISC-V has had an incredible year of growth and momentum. This year, our technical community has grown 66 percent to more than 2,300 individuals in our more than 50 technical and special interest groups. We’re seeing increased market momentum of RISC-V cores, S... » read more

AMD Wants An FPGA Company, Too


AMD signed a definitive agreement to acquire Xilinx for $35 billion in stock, setting the stage for a head-to-head battle against Intel in nearly all major markets. But there's more to this acquisition than just keeping up with AMD's arch-competitor. To begin with, the acquisition has a big impact on the programmable logic market. The only pure-play FPGA vendors left are Lattice, Achronix, a... » read more

Maximizing Value Post-Moore’s Law


When Moore's Law was in full swing, almost every market segment considered moving to the next available node as a primary way to maximize value. But today, each major market segment is looking at different strategies that are more closely aligned with its individual needs. This diversity will end up causing both pain and opportunities in the supply chain. Chip developers must do more with a ... » read more

Big Changes For eFPGAs


Geoff Tate, CEO of Flex Logix, talks with Semiconductor Engineering about the state of embedded FPGAs, why this is easier for some companies than others, why this is important for adding flexibility into an ASIC, and what are the main applications for this technology. » read more

Week In Review: Design, Low Power


Tools Synopsys debuted the VC SpyGlass RTL Static Signoff platform featuring new noise reduction technology that uses machine learning to reduce noise by 10X without loss of quality of results. It also provides comprehensive CDC and RDC analysis to catch logic issues added during implementation, and is integrated with Synopsys' automated debug system. Ansys released RaptorH, a tool that com... » read more

Where Is The eFPGA Market And Ecosystem Headed?


In this article we’ll discuss the availability of eFPGA, the applications for eFPGA and the current and future market size for eFPGA. eFPGA vendors & offerings Embedded FPGA is a new development this decade. There are now multiple vendors offering eFPGA on a wide range of process nodes with multiple customers. eFPGA Vendors Menta has had eFPGA available for the longest: their offe... » read more

How To Integrate An Embedded FPGA


Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric ... » read more

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