Blog Review: Aug. 6


Mentor’s Colin Walls takes a look at bad behavior—the undefined kind that you get from doing C programming wrong and adding too much complexity up front. Cadence’s Brian Fuller interviews his colleague about what engineers need to know in regards to finFETs, advanced nodes and parasitic extraction. Short answer: Plenty. Synopsys’ Mick Posner is building FPGA prototype boards and... » read more

Selecting An Operating System For Embedded Applications


It seems these days, just about every embedded system has some type of operating system. And there are more options today as to which OS to choose. Is open source your best choice? What about a free RTOS? In this paper, learn the pros and cons of the many OS options available today and how to select the right OS for your next embedded project. To read more, click here. » read more

Designing For Security


Some level of security is required in SoC today, whether it is in hardware, software or — most commonly — both. Of course, there is a price to pay from a power and performance perspective, but thankfully just a small one in most cases. The explosion of consumer devices has driven the need for increased security features in smart cards, smart phones, personal computers, home networks, and... » read more

Internet Of Things Design Considerations For Embedded Connected Devices


Embedded connectivity has been around since the early days of M2M. But what is new are the many complexities and emerging standards embedded system developers need to know if they are to design the latest IoT device. This paper delves into many of the key considerations developers need to know and discusses the critical areas of IoT security and connectivity along with the importance of a prove... » read more

Blog Review: July 30


Mentor’s Colin Walls looks at a free collaborative online tool called codepad, which can be used for compiling, interpreting and executing code quickly. Free is good—sometimes. Cadence’s Brian Fuller followed a recent panel on high-speed, cross-fabric interface design, which focused on why designers need to consider chip, package and board to ensure signal and power integrity. So what... » read more

DAC Is Starting To Heat Up


As we reach the midpoint of summer, it’s time to kick back and enjoy vacation and the sunshine. But don’t get too relaxed, because paper submissions are just around the corner. Turning up the temperature on paper submissions Last week I introduced you to DAC’s two technical program co-chairs Sharon Hu and Rob Aitken. They lead our technical program committee, a world-wide volunteer n... » read more

The Week In Review: Manufacturing


Here’s a sad commentary on the state of Japan’s electronics industry: Some Japanese electronics giants are converting unused factories and fabs into agricultural growing facilities, according to The Wall Street Journal. Last month, for example, Fujitsu began selling lettuce from the Aizu-Wakamatsu plant. It's officially over. IBM's talks to sell its chip unit to GlobalFoundries have offi... » read more

The Week In Review: Design


Tools Sonics upgraded its on-chip network, improving support for memory subsystems as well as performance with guaranteed bandwidth allocation across multiple SOC flows. The company said these upgrades add support for the latest DDR4 and LPDDR4 memories, for the multi-threading capabilities of the Open Core Protocol interface, and while adding non-blocking concurrency technologies. Mentor G... » read more

IP Integration Challenges Rising


It’s not just [getkc id="80" comment="lithography"] that is putting a crimp in sub-28nm designs. As more functions, features, transistors and software are added onto chips, the pressure to get chips out the door has forced chipmakers to lean more heavily on third-party IP providers. Results, as you might expect, have been mixed. The number of blocks has mushroomed, creating its own web of ... » read more

EDA’s Hedge Plays


While 14/16nm process technologies with finFETs and double patterning have pushed complexity to new heights, the move to 10nm fundamentally will change a number of very basic elements of the design through manufacturing flow—and EDA vendors will be caught in the middle of having to make hard choices between foundries, processes, packaging approaches, and potentially which markets to serve. ... » read more

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