tag: Mentor Graphics

Week 38: Finishing The DAC Program
By Anne Cirkel - 02 Mar, 2015 - Comments: 0

The DAC executive committee convened last week for a two-day meeting to finalize the technical program. We call this the Wintermeeting, which by tradition is usually held at a destination chosen by the general chair. This year it was my turn and I selected a dude ranch in Wickenburg, Arizona. While the meeting serves the purpose of locking down all the final details for the conference program, ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 27 Feb, 2015 - Comments: 0

Mergers & Acquisitions NXP acquired Quintic’s Bluetooth Low Energy and Wearable businesses, adding BLTE to their low power RF-connectivity portfolio. The team of approximately 65 is expected to join NXP when the deal closes in Q1 2015. Tools Cadence unveiled the integration of Forte's Cynthesizer with their own C-to-Silicon Compiler. The result is the Stratus high-level synthesis... » read more

Mentor Graphics Buys Tanner EDA
By Ed Sperling - 26 Feb, 2015 - Comments: 4

By Ed Sperling & Brian Bailey [getentity id="22017" e_name="Mentor Graphics"] has just purchased [getentity id="22561" e_name="Tanner EDA"] for an undisclosed sum, according to sources close to the deal. The acquisition moves Mentor squarely into the analog and mixed signal tools world, while positioning it to play a much bigger role in the Internet of Things market. Mentor isn't t... » read more

Partition Lines Growing Fuzzy
By Ed Sperling - 26 Feb, 2015 - Comments: 0

For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

Incremental Design Methodologies
By Brian Bailey - 26 Feb, 2015 - Comments: 0

There are times when we become stuck in the past, or choose to believe something that is no longer true or actually never was true. As we get older, we are all guilty of that. History tends to rewrite itself, especially given that this industry is aging. One of these situations occurred recently, and comments from an industry luminary didn’t align with the thoughts and memories of other peopl... » read more

Custom Versus Platform Design
By Ed Sperling - 26 Feb, 2015 - Comments: 0

The increase in [getkc id="81" kc_name="SoC"] complexity is being mirrored by a rise in complexity within the markets that drive demand for those chips. The upshot is that a push toward greater connectivity, lower power and better performance—and all for a minimal cost—has turned the pros and cons for custom design vs. platforms and superchips into a murky decision-making process. For t... » read more

First Time Success And Cost Control
By Brian Bailey - 26 Feb, 2015 - Comments: 0

First time success has been the ultimate goal for semiconductor companies due to escalating mask costs, as well as a guiding objective for the development of EDA tools, especially in the systems and verification space. These pressures are magnified for the [getkc id="76" comment="Internet of Things"] (IoT), especially the edge devices. Have system-level tools been able to contribute to first ti... » read more

Defining Functional Accuracy
By Jon McDonald - 26 Feb, 2015 - Comments: 0

I have been heavily involved in a project that recently completed. It involved creating virtual platforms (VPs) for a number of Altera’s FPGA SoCs. If you’re interested in more information, an announcement on the VP availability went out last week. Some of the modeled platforms existed and some were in various stages of development. The goal of the project was to deliver functionally acc... » read more

Debug This!
By Mentor, a Siemens Business - 25 Feb, 2015 - Comments: 0

Class-based debug is not the same as debugging RTL. You don’t have to be an object-oriented programmer in order to debug a class-based testbench, which is just a bunch of objects – some statically created, some dynamic – which interact with the DUT. The upshot? Class based debug doesn’t have to be hard! To read more, click here. » read more

Blog Review: Feb. 25
By Jesse Allen - 25 Feb, 2015 - Comments: 0

Synopsys' Aron Pratt continues his series on SystemVerilog interfaces and strategies for dealing with parameterization. There are workarounds to the problems it introduces, but they come with a price. Mentor's John Day digs into Volvo's plans for autonomous autos. There are a lot of speedbumps ahead, and while it's easy to build a self-driving concept vehicle, actually getting on the road is... » read more

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