Week In Review: Design, Low Power


MoSys, a provider of SRAM solutions and networking accelerators, and Peraso Technologies, a provider of 5G mmWave devices, are merging. Stockholders of Peraso are expected to hold a 61% equity interest in the combined company, with the remaining 39% equity interest to be retained by the stockholders of MoSys. Peraso CEO Ronald Glibbery said, "By joining with MoSys, we believe we can deliver a b... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Arm announced a new software architecture, two reference hardware implementations, and its role leading a new industry group that will work on open-source software for automotive use. The Scalable Open Architecture for Embedded Edge (SOAFEE) is based on Arm’s Project Cassini and SystemReady, aims to help the automotive industry move to software-defined systems by tackling the comp... » read more

Blog Review: Sept. 15


Synopsys' Ian Land and Ricardo Borges examine how radiation modeling can help ensure semiconductor components will survive while housed in equipment that is orbiting our planet or traveling through deep space over extensive periods of time. Siemens EDA's Rich Edelman explores why writing coverage is an art requiring imagination, practice, and patience, along with some tips on how to improve.... » read more

Long-Haul Trucking With Fewer Drivers


The trucking industry is betting heavily on increasing levels of autonomy and electrification to reduce the cost of moving goods and to overcome persistent problems. The economics of autonomous driving are compelling, not least of which is an almost perpetual shortage of qualified drivers. But there also are a number of technical hurdles to making this work. On top of the challenges facing t... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Intel’s Mobileye and Sixt SE said they are collaborating on an autonomous ride-hailing services in Munich in 2022. Mobileye will own the robotaxi fleet. Mobileye also recently unveiled its electric autonomous vehicle (AV), which it will use in ridehailing in Munich and Tel Aviv.. To increase the supply of automotive chips, Intel said it will build new chip manufacturing facilit... » read more

Wrestling With Analog At 3nm


Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

The Shortest Path Deception


When manufacturing, assembling, and using integrated circuit (IC) chips, the electrostatic discharge (ESD) caused by accumulated static can damage the IC circuitry if the circuit is not properly protected [1]. To prevent such damage, ESD protection devices are designed into the circuitry such that they will create a low impedance path that limits the peak voltage and current by diverting excess... » read more

Shortest Resistance Path Deception In ESD Protection Circuit P2P Debug


Verifying and fixing ESD protection circuit violations is an essential step in tapeout sign-off flows for today’s IC chip designs. As one of the most commonly used ESD verification flows, the point to point (P2P) flow checks the resistances of ESD discharge paths in layout designs to ensure they are within design thresholds. However, when debugging P2P violations, information such as the shor... » read more

Blog Review: Sept. 8


Synopsys' Scott Durrant considers the IP used in HPC SoCs and the efforts to simultaneously minimize data movement and maximize the speed at which data is transferred from one location to another, whether that data transfer is across long distances or from one chip to another within a server. Cadence's Paul McLellan looks into a new version of the Rowhammer DRAM vulnerability that can allow ... » read more

How To Maximize Your Competitiveness In The Semiconductor Industry Using Advanced DFT


Embarking on advanced SoCs without a smart design-for-test (DFT) strategy can be harmful to your bottom line. Being competitive in today’s semiconductor market means adopting integrated, scalable, and flexible solutions to cut DFT implementation time, test costs, and time-to-market. Tessent DFT technologies, developed in partnership with industry leaders, provide the most advanced DFT and yie... » read more

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