tag: Mentor

Cybersecurity: The Case For Hardware-Based Threat Detection And Mitigation
By Siemens EDA - 04 May, 2022 - Comments: 0

The requirements of cyberphysical systems place great responsibility on design teams. Their mission-critical roles in controlling mechanical systems, from aircraft though motor vehicles to industrial plants, have always called for safety-focused design. As these systems have become connected to the internet, safety has become intertwined with security. One mechanism for detecting suspicious ... » read more

Blog Review: May 4
By Jesse Allen - 04 May, 2022 - Comments: 0

In a podcast, Arm's Geof Wheelwright chats with Steve Furber of the University of Manchester and Christian Mayr of Technische Universität Dresden about spiking neural networks and the SpiNNaker project to build a platform for realistic real-time models of brain functions. Synopsys' Licinio Sousa checks out how the MIPI protocol enables the connectivity needed for sensor fusion and increasin... » read more

CEO Outlook: Chip Industry 2022
By Ed Sperling - 02 May, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss broad industry changes and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a live audience... » read more

Formal Verification Ensures The Perseverance Rover Lands Safely On Mars
By Joseph Hupcey III - 28 Apr, 2022 - Comments: 0

By Joe Hupcey III and Kevin Campbell Safely landing a spacecraft anywhere on Mars is a complex, high-risk challenge. Even worse, the most scientifically interesting areas of the planet are guarded by boulders, ditches, and tall cliffs — land formations that aren’t very welcoming to vehicles. Such was the case with the Mars Perseverance Rover's Landing Site: Jezero Crater. It’s not an e... » read more

Choosing Which Tasks To Optimize In Chips
By Brian Bailey - 28 Apr, 2022 - Comments: 0

The optimization of one or more tasks is an important aspect of every SoC created, but with so many options now on the table it is often unclear which is best. Just a few years ago, most people were happy to buy processors from the likes of Intel, AMD and Nvidia, and IP cores from Arm. Some even wanted the extensibility that came from IP cores like Tensilica and ARC. Then, in 2018, John Henn... » read more

The Challenges Of Incremental Verification
By Brian Bailey - 28 Apr, 2022 - Comments: 1

Verification consumes more time and resources than design, and yet little headway is being made to optimize it. The reasons are complex, and there are more questions than there are answers. For example, what is the minimum verification required to gain confidence in a design change? How can you minimize the cost of finding out that the change was bad, or that it had unintended consequences? ... » read more

Big Changes In Embedded Software
By Ann Mutschler - 28 Apr, 2022 - Comments: 0

Every good hardware or software design starts with a structured approach throughout the design cycle, but as chip architectures and applications begin focusing on specific domains and include some version of AI, that structure is becoming more difficult to define. Embedded software, which in the past was written for very narrow functions with a minimal footprint, is increasingly getting blended... » read more

Arm’s Input Qualification Methodology Using PowerPro
By Siemens EDA - 27 Apr, 2022 - Comments: 0

This white paper proposes a new automated input qualification methodology that Arm developed using Siemens EDA’s PowerPro software portfolio that performs various data integrity checks at the IC design build and prototype stage. This methodology ensures in quicker iterations that input data are high fidelity, leading to a well correlated power numbers. Should multiple iterations be necessary,... » read more

Blog Review: April 27
By Jesse Allen - 27 Apr, 2022 - Comments: 0

Siemens' Joseph Dailey and Jake Wiltgen dispel misunderstandings around safety qualification of software tools and point to some of the safety issues that could lead to schedule delays and additional costs. Synopsys' Mark Kahan explains the testing that went into creating parts of the James Webb Space Telescope and key questions that were asked to ensure the mission could be successful even ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 22 Apr, 2022 - Comments: 0

Automotive, mobility Synopsys uncorked its new neural processor IP, which can be used to develop scalable neural processors in automotive and consumer products. The ARC NPX6 NPU IP can run at 3,500 TOPS (30 TOPS per watt), running up to 96K MACs with enhanced utilization, new sparsity features and new interconnect for scalability. The ARC NPX6FS NPU IP and MetaWare MX Toolkit for Safety can be... » read more

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