Week In Review: Design, Low Power

By Jesse Allen - 09 Jun, 2023 - Comments: 0

Renesas Electronics completed its acquisition of Panthronics, a fabless company specializing in near-field communication (NFC) wireless products. Renesas has already incorporated Panthronics NFC technology into several solution reference designs for applications such as payment, IoT, asset tracking, and smart meters. The European Commission announced new funding for the semiconductor and mic... » read more

Multi-Beam Mask Writers Are A Game Changer

By Jan Willis - 22 Dec, 2022 - Comments: 0

The eBeam Initiative’s 11th annual Luminaries survey in 2022 reported strong purchasing predictions for multi-beam mask writers, enabling both EUV and curvilinear photomask growth. A panel of experts debated remaining barriers to curvilinear photomask adoption during an event co-located with the SPIE Photomask Technology Conference in late September. Industry luminaries representing 44 compan... » read more

High-NA EUV Complicates EUV Photomask Future

By Jan Willis - 17 Nov, 2022 - Comments: 0

The eBeam Initiative’s 11th annual Luminaries survey in 2022 reported EUV fueling growth of the semiconductor photomask industry while a panel of experts cited a number of complications in moving to High-NA EUV during an event co-located with the SPIE Photomask Technology Conference in late September. Industry luminaries representing 44 companies from across the semiconductor ecosystem partic... » read more

Week In Review: Design, Low Power

By Jesse Allen - 11 Nov, 2022 - Comments: 0

Chip design Fraunhofer IIS/EAS implemented the Bunch of Wires (BoW) standard-based interface IP from the Open Compute Project (OCP) on Samsung's 5nm technology. The effort is intended to make chiplets more feasible for products with small and medium-sized production runs and determine the need for additional uniform standards in the future, such as for die-to-die bonding. “As part of t... » read more

Week In Review: Design, Low Power

By Jesse Allen - 08 Jul, 2022 - Comments: 0

Tools, IP, design Infineon Technologies acquired NoBug, a provider of design verification services. The acquisition will help Infineon expand its IoT R&D business in eastern Europe. “This considerable increase in superior verification know-how lets Infineon offer its customers more of its leading products at a reduced time-to-market,” said Guenter Krasser, Vice President and Managing D... » read more

Week In Review: Design, Low Power

By Jesse Allen - 01 Jul, 2022 - Comments: 0

IP, design Arm unveiled a number of new CPUs and GPUs. Based on the Armv9 architecture, the Cortex-X3 aims to improve single-threaded performance and targets a range of benchmarks and applications. The Cortex-A715 focuses on efficient performance, delivering a 20% energy efficiency gain and 5% performance uplift compared to Cortex-A710. In addition, the Cortex-A510 and DSU-110 were updated to ... » read more

The Changing Mask Landscape

By Jan Willis - 19 May, 2022 - Comments: 0

Semiconductor photomasks have undergone some major technology changes in the past few years after relatively minor changes for many years. New technologies such as multi-beam mask writers and extreme ultraviolet (EUV) lithography are major breakthroughs as they ramp into high-volume manufacturing. A new trend related to these technologies is the use of curvilinear features on photomasks. Aki... » read more

Blog Review: March 9

By Jesse Allen - 09 Mar, 2022 - Comments: 0

Arm's Ajay Joshi investigates how to select the right benchmark for CPUs used in the Home device market, such as digital television and set-top box/over-the-top devices. Ansys' Jon Kordell checks out how reliability physics simulations and physical component characterization can support component swapping in high-reliability applications when the original part is unavailable due to supply ch... » read more

Week In Review: Design, Low Power

By Jesse Allen - 04 Mar, 2022 - Comments: 0

Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials

By Technical Paper Link - 23 Dec, 2021 - Comments: 0

Abstract "The main motivation of this review is to study the evolution of first and second level of interconnect materials used in memory device semiconductor packaging. Evolutions of bonding wires from gold (Au) to silver (Ag) or copper (Cu) have been reported and studied in previous literatures for low-cost solution, but Au wire still gives highest rating in terms of the performance of tempe... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Micron Technology

Week In Review: Design, Low Power

Multi-Beam Mask Writers Are A Game Changer

High-NA EUV Complicates EUV Photomask Future

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: Design, Low Power

The Changing Mask Landscape

Blog Review: March 9

Week In Review: Design, Low Power

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials