Lab-To-Fab Testing


Test equipment vendors are working on integrating testing and simulation in the lab with testing done later in the fab, setting the stage for what potentially could be the most significant change in semiconductor test in years. If they are successful, this could greatly simplify design for test, which has become increasingly difficult as chips get more complex, denser, and as more heterogene... » read more

Dynamic Fault Injection For System-Level Simulation Of MEMS


In this paper a method for dynamic fault injection and fault simulation as well as its application to MEMS based sensor systems is described. The prerequisite for this approach is the availability of accurate, but numerically efficient models for the MEMS element. Simulations based on SystemC and SystemC AMS are suitable to analyze the nominal behavior of complex sys- tems including electronics... » read more

More Sigmas In Auto Chips


The journey to autonomous cars is forcing fundamental changes in the way chips are designed, tested and tracked, from the overall system functionality to the IP that goes into those systems. This includes everything from new requirements for automotive-grade chips to longer mean time between failures. But it also makes it far more challenging, time-consuming and complicated to create these d... » read more

Searching For A System Abstraction


Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

Is It Time To Take Inductance And Electromagnetic Effects On SoCs Seriously?


Electromagnetic (EM) crosstalk impact on SoC performance has been a topic of discussion for a number of years, but how seriously have designers put EM crosstalk detection and avoidance into their SoC design practice? With increasing demand for faster bandwidth, lower power and higher density electronic systems, isn’t it about time to take inductance and EM effects seriously? This topic will b... » read more

Why All Nodes Won’t Work


A flood of new nodes, half-nodes and every number in between is creating confusion among chipmakers. While most say it's good to have choices, it's not clear which or how many of those choices are actually good. At issue is which [getkc id="43" kc_name="IP"] will be available for those nodes, how that IP will differ from other nodes in terms of power, performance, area and sensitivity to a v... » read more

Executive Insight: Wally Rhines (March 2018)


Wally Rhines, president and CEO of [getentity id="22017" e_name="Mentor, a Siemens Business"], sat down with Semiconductor Engineering to discuss a wide range of industry and technology changes and how that will play out over the next few years. What follows are excerpts of that conversation. SE: What will happen in the end markets? Rhines: The end markets are perhaps more exciting from a... » read more

Using Data Mining Differently


The semiconductor industry generates a tremendous quantity of data, but until very recently engineers had to sort through it on their own to spot patterns, trends and aberrations. That's beginning to change as chipmakers develop their own solutions or partner with others to effectively mine this data. Adding some structure and automation around all of this data is long overdue. Data mining h... » read more

Testing Analog Chips


The world of analog components is broad and diverse, and while testing analog chips may not take as long as running tests on complex SoCs, there are different requirements for analog devices. One type of chip that's seeing more application these days is analog microelectromechanical system devices. Automotive electronics call for a number of [getkc id="37" kc_name="analog"] chips, along with... » read more

Mixed-Signal Issues Worse At 10/7nm


Despite increasingly difficulty in scaling digital logic to 10/7nm, not all designs at the leading edge are digital. In fact, there are mixed-signal components in designs at almost all nodes down to 10/7nm. This may seem surprising because analog scaling has been an issue since about 90nm, but these are not traditional analog components. Analog IP increasingly includes highly integrated, mix... » read more

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