The Impact Of 5G On Silicon Design

By Ron Lowman - 07 Jan, 2021 - Comments: 0

5G, the next-generation of mobile broadband, is driving tremendous increases in data throughput for mobile applications by introducing carrier aggregation, massive MIMO, advanced modulation, and high bandwidth channels in the mmWave spectrum. However, 5G and its governing body, 3GPP, has very high expectations to expand its capabilities well beyond the mobile market, and move into many new area... » read more

Digital Immersion: The Next Step Towards The Future Of Mobile Devices And Connectivity

By Frank Schirrmeister - 28 May, 2020 - Comments: 0

In considering how far we’ve come with mobile devices just in the last two decades, it’s entertaining to think about the next ten years. When asking the new power users, Generation Z or the “digital natives,” a couple of key themes emerge, both for mobile devices, as well as for the networks they reside in. Some key advancements have been made this week with the announcement of Arm’s ... » read more

Power-Hungry Safety And Security

By Brian Bailey - 09 Apr, 2020 - Comments: 0

There is a price to pay for everything. When it comes to adding safety and security into a device, the costs in terms of power and area can be significant, but if the task is taken seriously, those costs can be managed and minimized. New analysis and implementation tools are coming to market that can also help to keep the costs contained. But it also requires the right mindset. As more indus... » read more

LPDDR4/4X DRAM Variants and Possible System Configurations

By Synopsys - 26 Feb, 2020 - Comments: 0

LPDDR is the de-facto standard for main-memory targeting mobile applications such as smartphones and tablets. Low-Power Double Data Rate Synchronous Dynamic Random Access Memories (LPDDR SDRAMs) or DRAMS offer high-performance while consuming significantly lower power than standard DDR memories, such as DDR5/4/3, which are ideal for systems requiring large memory capacity. For this reason, LPDD... » read more

Speeding Up 3D Design

By Brian Bailey - 14 Nov, 2019 - Comments: 0

2.5D and 3D designs have garnered a lot of attention recently, but when should these solutions be considered and what are the dangers associated with them? Each new packaging option trades off one set of constraints and problems for a different set, and in some cases the gains may not be worth it. For other applications, they have no choice. The tooling in place today makes it possible to de... » read more

High-Performance DSP And Control Processing For Complex 5G Requirements

By Graham Wilson - 12 Sep, 2019 - Comments: 0

In the early 2000s, digital signal processors (DSP) were simple in architecture and limited in performance, but complex in programming. However, they evolved to meet of the increased performance requirements of 3G cellular baseband modem applications. A typical 3G modem system would have a single DSP optimized for dual/quad SIMD MAC performance with basic DSP filter instructions like Fast Fouri... » read more

Why Integrated SIM Will Unleash The Secure, Mobile IoT

By Dana Neustadter - 01 Aug, 2019 - Comments: 0

Connected IoT devices such as sensors, object trackers, security cameras, intelligent traffic lights, wearables and smart meters are proliferating at a rapid pace. A significant number of connected IoT devices use cellular technology for communication. 5G is setting the stage for the next wave of devices to enable rapid IoT connectivity at an even greater scale. NB-IoT and LTE-M, which are low ... » read more

Adapting Mobile To A Post-Moore’s Law Era

By Ann Mutschler - 14 Feb, 2019 - Comments: 0

The slowdown in Moore's Law is having a big impact on chips designed for the mobile market, where battery-powered devices need to still improve performance with lower power. This hasn't slowed down performance or power improvements, but it has forced chipmakers and systems companies to approach designs differently. And while feature shrinks will continue for the foreseeable future, they are ... » read more

Power/Performance Bits: Nov. 20

By Jesse Allen - 20 Nov, 2018 - Comments: 0

In-memory compute accelerator Engineers at Princeton University built a programmable chip that features an in-memory computing accelerator. Targeted at deep learning inferencing, the chip aims to reduce the bottleneck between memory and compute in traditional architectures. The team's key to performing compute in memory was using capacitors rather than transistors. The capacitors were paire... » read more

What’s The Outlook for Memory?

By Mark LaPedus - 15 Nov, 2018 - Comments: 2

What a difference a year makes in the memory business. At this time last year, the industry was in the midst of a boom cycle for both NAND and DRAM. More specifically, there was huge demand for 3D NAND. Then, starting in the first quarter of 2018, the NAND market began to decline and it continues to fall. And now, the DRAM market is also falling off the cliff. So, it’s time to take a q... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?