Electronic Gas Concerns On The Rise

By Ed Sperling - 20 Aug, 2015 - Comments: 0

In the grand scheme of the semiconductor supply chain, electronic gases are something most engineers and scientists never think about. Behind the gleaming machinery and brightly labeled tubes, however, these gases allow wafers to be etched, kept at optimum temperatures, and prepared for the application of thin films. Electronic gases are remarkably well managed in high-volume fabs, which is ... » read more

Tech Talk: 10nm Patterning

By Brian Bailey - 20 Aug, 2015 - Comments: 0

David Abercrombie, advanced physical verification methodology program manager at Mentor Graphics, talks about triple and quadruple patterning after 20/16/14nm and what design teams need to understand to get this right. [youtube vid=7bjutPWakpw] » read more

Rethinking Manufacturing Models

By Ed Sperling - 23 Jul, 2015 - Comments: 0

The perennial uncertainty surrounding EUV lithography and complications stemming from the most advanced nodes are creating a domino effect across the semiconductor industry. Rather than stalling the market, though, which is what happened with the transition to 20nm, vendors now are accelerating their product rollouts and adjusting business plans to capitalize on those delays. That includes m... » read more

5 Technologies To Watch

By Mark LaPedus - 23 Jul, 2015 - Comments: 0

The industry is developing a dizzying array of new technologies. In fact, there are more new and innovative technologies than ever before. And the list is countless. At least from my vantage point, I have come up with my own list of the top five technologies to watch in 2015 and beyond. They are listed in alphabetical order. (See below). Obviously, there are more than just five technologi... » read more

Is EUV Making Progress?

By Ann Mutschler - 18 Jun, 2015 - Comments: 4

By Ann Steffora Mutschler & Ed Sperling EUV has been promised for a couple of decades, counted on for at least three process nodes on the ITRS roadmap, and considered essential to chip manufacturing since 22nm. Billions of dollars have been invested in R&D, engineering teams from around the world have contributed to its development, and still serious problems persist. Just how close... » read more

FinFET And Multi-Patterning Aware Place And Route Implementation

By Mentor, a Siemens Business - 18 Jun, 2015 - Comments: 0

The use of finFETs and multi-patterning has a huge impact on the entire physical implementation flow. This paper outlines the new challenges in placement, routing, optimization, and physical verification and describes how the Olympus-SoC place and route system handles them. To read more, click here. » read more

In-Die Registration Measurement Using Novel Model-Based Approach For Advanced Technology Masks

By KLA - 18 Jun, 2015 - Comments: 0

In recent years, 193nm immersion lithography has been extended instead of adopting EUV lithography. And multi-patterning technology is now widely applied, which requires tighter specification as the pattern size gets smaller on advanced semiconductor devices. Regarding the mask registration metrology, it is necessary to consider some difficult challenges like tight repeatability and complex In-... » read more

SoC Integration Headaches Grow

By Ed Sperling - 16 Jun, 2015 - Comments: 0

As the number of IP blocks grows, so do the headaches of integrating the various pieces and making sure they perform as planned within a prescribed power envelope. This is easier said than done, particularly at the most advanced process nodes. There are more blocks, more power domains, more states and use-model dependencies, and there is much more contention for memories. There are physical ... » read more

What’s After 10nm?

By Ed Sperling - 21 May, 2015 - Comments: 0

Prior to 28nm the semiconductor road map was astoundingly predictable. Every two years you could be assured that features would shrink until there were no more atoms left. Two big things and lots of little things later, the trajectory looks much more uncertain. On the large things side are the obvious culprits—EUV delays, and RC delay caused by thinner wires. This is tough science. Pro... » read more

10nm Fab Watch

By Mark LaPedus - 21 May, 2015 - Comments: 1

When will the 10nm logic node happen? Analysts believe that foundry vendors will move into 10nm finFET volume production around 2017. Still others say the 10nm finFET ramp could take place anywhere from 2018 to 2020. The predictions are all over the map. One way to predict the timing, progress and demand for 10nm is simple: Follow the fabs. In fact, Intel, Samsung, TSMC and GlobalFound... » read more

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Knowledge Centers
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tag: multi patterning