Chip Industry Technical Paper Roundup: Oct. 8


New technical papers recently added to Semiconductor Engineering’s library: [table id=365 /] More ReadingTechnical Paper Library home » read more

Ambipolar Schottky-based FeFET For Ultrascaled Memory Applications


A new technical paper titled "On the Potential of Ambipolar Schottky-Based Ferroelectric Transistor Designs for Enhanced Memory Windows in Scaled Devices" was published by researchers at Global TCAD Solutions, Igor Sikorsky Kyiv Polytechnic Institute, INSA Lyon, and NaMLab. "Here, we promote an ambipolar Schottky-based ferroelectric transistor (AS-FeFET) as an alternative design. We demonstr... » read more

Roadmap To Neuromorphic Computing (Collaboration of 27 Universities/Companies)


A technical paper titled “Roadmap to Neuromorphic Computing with Emerging Technologies” was published by researchers at University College London, Politecnico di Milano, Purdue University, ETH Zurich and numerous other institutions. Summary: "The roadmap is organized into several thematic sections, outlining current computing challenges, discussing the neuromorphic computing approach, ana... » read more

Chip Industry’s Technical Paper Roundup: Jan. 8


New technical papers added to Semiconductor Engineering’s library this week. [table id=183 /] More ReadingTechnical Paper Library home » read more

8-In-1 Reconfigurable Logic Gate (TU Dresden)


A technical paper titled “The RGATE: an 8-in-1 Polymorphic Logic Gate Built from Reconfigurable Field Effect Transistors” was published by researchers at TU Dresden and NaMLab. Abstract: "We present the hardware implementation of a reconfigurable universal logic gate, that we call RGATE, able to deliver up to eight different logic functionalities and based on a symmetric four-transistors... » read more

Rapid Prototyping For Emerging Semiconductor Devices


A technical paper titled “Generating Predictive Models for Emerging Semiconductor Devices” was published by researchers at TU Darmstadt and NaMLab. Abstract: "Circuit design requires fast and scalable models which are compatible to modern electronic design automation tools. For this task typically analytical compact models are preferred. However, for emerging device concepts with altered ... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Characteristics of Three-Gated Reconfigurable FETs


A new technical paper titled "Insights into the Temperature Dependent Switching Behaviour of Three-Gated Reconfigurable Field Effect Transistors" was published by researchers at NaMLAB and TU Dresden. "In this work, it is possible to assess the performances of Three-Gated Reconfigurable Field Effect Transistors within a considerable temperature span and finally provide significant insights o... » read more

Possible Uses Narrow For Negative Capacitance FETs


The discovery of a ferroelectric phase in hafnium dioxide (HfO2) has sparked significant interest in opportunities for integration of ferroelectric transistors and memories with conventional CMOS devices. Demonstrations of “negative capacitance” behavior in particular suggest these devices might evade the 60 mV/decade limit on subthreshold swing, thereby improving transistor efficiency. ... » read more

Memory Startups To Watch


The next-generation memories are finally ramping up after years’ of delays and promises. Intel, for one, is shipping 3D XPoint, a next-generation technology based on phase-change memory. In addition, the big foundries are readying embedded MRAM. And, of course, there are a number of other players in the next-generation memory arena. There are also a number of startups that are flying un... » read more

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