tag: National University of Singapore

Chip Industry’s Technical Paper Roundup: October 3
By Liz Allan - 03 Oct, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=150 /] Related Reading Technical Paper Library home » read more

Chip Industry Week In Review
By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

Improving ML-Based Device Modeling Using Variational Autoencoder Techniques
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Improving Semiconductor Device Modeling for Electronic Design Automation by Machine Learning Techniques” was published by researchers at Commonwealth Scientific and Industrial Research Organisation (CSIRO), Peking University, National University of Singapore, and University of New South Wales. Abstract: "The semiconductors industry benefits greatly from the integ... » read more

Detecting Hardware Trojans Using Analytical Modeling
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models” was published by researchers at National University of Singapore and Universitat Politecnica de Catalunya. Abstract: "Hardware Trojans, malicious components that attempt to prevent a chip from operating as expected, are carefully crafted to circumvent detection during the pre-deploymen... » read more

Ferroelectric Memories Answer Call For Non-Volatile Alternatives
By Katherine Derbyshire - 21 Sep, 2023 - Comments: 0

As system designers seek to manipulate larger data sets while reducing power consumption, ferroelectric memory may be part of the solution. It offers an intermediate step between the speed of DRAM and the stability of flash memory. Changing the polarization of ferroelectric domains is extremely fast, and the polarization remains stable without power for years, if not decades. FeFETs, one of ... » read more

3D In-Memory Compute Making Progress
By Katherine Derbyshire - 17 Aug, 2023 - Comments: 0

Indium compounds are showing great promise for 3D in-memory compute and RF integration, but more work is needed. Researchers continue to make headway into 3D device integration particularly with indium tin oxide (ITO), which is widely used in display manufacturing. Recent work indicates that different compounds of indium oxide doped with tin, gallium, or zinc combinations may boost transisto... » read more

Specialization Vs. Generalization In Processors
By Brian Bailey - 10 Aug, 2023 - Comments: 1

Academia has been looking at specialization for many years, but solutions were rejected because general-purpose solutions were advancing fast enough to keep up with most application requirements. That is no longer the case. The introduction and support of the RISC-V processor architecture has attracted a lot of attention, but whether that is the right direction for the majority of modern comput... » read more

Week In Review: Auto, Security, Pervasive Computing
By Liz Allan - 21 Jul, 2023 - Comments: 0

The Biden-Harris Administration announced the U.S. Cyber Trust Mark, a cybersecurity certification and labeling program to help consumers choose smart devices less vulnerable to cyberattacks. The Federal Communications Commission (FCC) is applying to register the Cyber Trust Mark with the U.S. Patent and Trademark Office and it would appear on qualifying smart products, including refrigerators,... » read more

Research Bits: July 18
By Jesse Allen - 18 Jul, 2023 - Comments: 0

Miniaturized ferroelectric FETs Researchers from the University of Pennsylvania, Hanyang University, King Abdulaziz University, King Abdullah University of Science and Technology, and University of Tokyo proposed a new ferroelectric FET (FE-FET) design with improved performance for both computing and memory. The transistor layers the two-dimensional semiconductor molybdenum disulfide (MoS2)... » read more

Chip Industry’s Technical Paper Roundup: July 18
By Liz Allan - 18 Jul, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=118 /] (more…) » read more

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